Re: [Regression] Commit "nvme/pci: Use host managed power state for suspend" has problems

From: Kai-Heng Feng
Date: Thu Aug 01 2019 - 05:06:05 EST


at 06:33, Rafael J. Wysocki <rafael@xxxxxxxxxx> wrote:

On Thu, Aug 1, 2019 at 12:22 AM Keith Busch <kbusch@xxxxxxxxxx> wrote:
On Wed, Jul 31, 2019 at 11:25:51PM +0200, Rafael J. Wysocki wrote:
A couple of remarks if you will.

First, we don't know which case is the majority at this point. For
now, there is one example of each, but it may very well turn out that
the SK Hynix BC501 above needs to be quirked.

Second, the reference here really is 5.2, so if there are any systems
that are not better off with 5.3-rc than they were with 5.2, well, we
have not made progress. However, if there are systems that are worse
off with 5.3, that's bad. In the face of the latest findings the only
way to avoid that is to be backwards compatible with 5.2 and that's
where my patch is going. That cannot be achieved by quirking all
cases that are reported as "bad", because there still may be
unreported ones.

I have to agree. I think your proposal may allow PCI D3cold,

Yes, it may.

Somehow the 9380 with Toshiba NVMe never hits SLP_S0 with or without Rafaelâs patch.
But the ârealâ s2idle power consumption does improve with the patch.

Can we use a DMI based quirk for this platform? It seems like a platform specific issue.


In which case we do need to reintroduce the HMB handling.

Right.

The patch alone doesnât break HMB Toshiba NVMe I tested. But I think itâs still safer to do proper HMB handling.

Kai-Heng