Re: [Regression] Commit "nvme/pci: Use host managed power state for suspend" has problems
From: Rafael J. Wysocki
Date: Thu Aug 01 2019 - 13:29:51 EST
On Thu, Aug 1, 2019 at 11:06 AM Kai-Heng Feng
<kai.heng.feng@xxxxxxxxxxxxx> wrote:
>
> at 06:33, Rafael J. Wysocki <rafael@xxxxxxxxxx> wrote:
>
> > On Thu, Aug 1, 2019 at 12:22 AM Keith Busch <kbusch@xxxxxxxxxx> wrote:
> >> On Wed, Jul 31, 2019 at 11:25:51PM +0200, Rafael J. Wysocki wrote:
> >>> A couple of remarks if you will.
> >>>
> >>> First, we don't know which case is the majority at this point. For
> >>> now, there is one example of each, but it may very well turn out that
> >>> the SK Hynix BC501 above needs to be quirked.
> >>>
> >>> Second, the reference here really is 5.2, so if there are any systems
> >>> that are not better off with 5.3-rc than they were with 5.2, well, we
> >>> have not made progress. However, if there are systems that are worse
> >>> off with 5.3, that's bad. In the face of the latest findings the only
> >>> way to avoid that is to be backwards compatible with 5.2 and that's
> >>> where my patch is going. That cannot be achieved by quirking all
> >>> cases that are reported as "bad", because there still may be
> >>> unreported ones.
> >>
> >> I have to agree. I think your proposal may allow PCI D3cold,
> >
> > Yes, it may.
>
> Somehow the 9380 with Toshiba NVMe never hits SLP_S0 with or without
> Rafaelâs patch.
> But the ârealâ s2idle power consumption does improve with the patch.
Do you mean this patch:
https://lore.kernel.org/linux-pm/70D536BE-8DC7-4CA2-84A9-AFB067BA520E@xxxxxxxxxxxxx/T/#m456aa5c69973a3b68f2cdd4713a1ce83be51458f
or the $subject one without the above?
> Can we use a DMI based quirk for this platform? It seems like a platform
> specific issue.
We seem to see too many "platform-specific issues" here. :-)
To me, the status quo (ie. what we have in 5.3-rc2) is not defensible.
Something needs to be done to improve the situation.
> >
> >> In which case we do need to reintroduce the HMB handling.
> >
> > Right.
>
> The patch alone doesnât break HMB Toshiba NVMe I tested. But I think itâs
> still safer to do proper HMB handling.
Well, so can anyone please propose something specific? Like an
alternative patch?