Re: [PATCH 2/2] mtd: spi-nor: intel-spi: add support for Intel Cannon Lake SPI flash
From: Jethro Beekman
Date: Sat Aug 31 2019 - 11:29:30 EST
On 2019-08-31 06:36, Mika Westerberg wrote:
Looks like some white space damage. There are couple of similar below as
well.
Oops. I will fix this in a v2 or resend later.
+ ispi->sregs = NULL;
+ ispi->pregs = ispi->base + CNL_PR;
+ ispi->nregions = CNL_FREG_NUM;
+ ispi->pr_num = CNL_PR_NUM;
Does CNL really have a different number of PR and FR regions than the
previous generations?
I'm using this as a reference:
https://www.intel.com/content/dam/www/public/us/en/documents/datasheets/300-series-chipset-pch-datasheet-vol-2.pdf
. If you have more accurate information, please let me know.
--
Jethro Beekman | Fortanix
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