Re: [PATCH v1 2/2] spi: cadence-qspi: Add QSPI support for Intel LGM SoC

[Ramuthevar, Vadivel MuruganX]

Hi Mark,

   Thank you for the comments and queries.

On 18/9/2019 8:08 PM, Mark Brown wrote:
> On Wed, Sep 18, 2019 at 01:59:06PM +0800, Ramuthevar, Vadivel MuruganX wrote:
> > On 17/9/2019 11:36 PM, Mark Brown wrote:
> > > On Tue, Sep 17, 2019 at 10:11:28AM +0800, Ramuthevar, Vadivel MuruganX wrote:
> > > > *    spi-cadence.c* in *drivers/spi/*, which supports very old legacy
> > > > cadence-spi based devices(normal)
> > > > *    cadence-quadspi.c(drivers/mtd/spi-nor/)* : specific support to SPI-NOR
> > > > flash with new spi-nor layer.
> > > >       all the API's in this driver purely on spi-nor specific, so couldn't
> > > > proceed to adapt.
> > > Are these completely separate IPs or are they just different versions of
> > > the same IP?
> > These are same IPs , but different features Enabled/Disabled depends upon
> > the SoC vendors.
> > for e.g: Intel LGM SoC uses the same IP, but without DMA and Direct access
> > controller.
> > also dedicated support to flash devices.
> If it's different versions of the same IP then everything should be in
> one driver with the optional features enabled depending on what's in a
> given system.
Agreed!, I am trying to adapt the driver/mtd/spi-nor/cadence-quadspi.c 
and newly sent patches
in a single driver file, also trying to use spi_mem_ops framework.

With Best Regards
Vadivel