Re: [PATCH v3 1/2] dt-bindings: reset: Add YAML schemas for the Intel Reset controller

[Dilip Kota]

On 11/23/2019 8:42 AM, Rob Herring wrote:
> On Wed, Nov 20, 2019 at 02:10:23PM +0800, Dilip Kota wrote:
> > Add YAML schemas for the reset controller on Intel
> > Gateway SoC.
> >
> > Signed-off-by: Dilip Kota <eswara.kota@xxxxxxxxxxxxxxx>
> > ---
> > Changes on v3:
> > 	Fix DTC warnings
> > 	Add support to legacy xrx200 SoC
> > 	Change file name to intel,rcu-gw.yaml
> >
> >   .../devicetree/bindings/reset/intel,rcu-gw.yaml    | 59 ++++++++++++++++++++++
> >   1 file changed, 59 insertions(+)
> >   create mode 100644 Documentation/devicetree/bindings/reset/intel,rcu-gw.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/reset/intel,rcu-gw.yaml b/Documentation/devicetree/bindings/reset/intel,rcu-gw.yaml
> > new file mode 100644
> > index 000000000000..743be2c49fb8
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/reset/intel,rcu-gw.yaml
> > @@ -0,0 +1,59 @@
> > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/reset/intel,rcu-gw.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: System Reset Controller on Intel Gateway SoCs
> > +
> > +maintainers:
> > +  - Dilip Kota <eswara.kota@xxxxxxxxxxxxxxx>
> > +
> > +properties:
> > +  compatible:
> > +    oneOf:
> > +      - items:
> You can drop oneOf and items here.
Ok.
Got it, mentioning 'enum:' tells that compatible will take one of the 
enum values. (Again, I just gone through existing yaml files after 
reading your comment).

So, no need of oneOf and items:, I will update in the next patch revision.

> > +          - enum:
> > +              - intel,rcu-lgm
> > +              - intel,rcu-xrx200
> > +
> > +  reg:
> > +    description: Reset controller registers.
> maxItems: 1
Ok. I will add it.
> > +
> > +  intel,global-reset:
> > +    $ref: /schemas/types.yaml#/definitions/uint32-array
> > +    description: Global reset register offset and bit offset.
> maxItems: 2
Ok. I will add it.

Regards,
Dilip
> > +
> > +  "#reset-cells":
> > +    minimum: 2
> > +    maximum: 3
> > +    description: |
> > +      First cell is reset request register offset.
> > +      Second cell is bit offset in reset request register.
> > +      Third cell is bit offset in reset status register.
> > +
> > +required:
> > +  - compatible
> > +  - reg
> > +  - intel,global-reset
> > +  - "#reset-cells"
> > +
> > +additionalProperties: false
> > +
> > +examples:
> > +  - |
> > +    rcu0: reset-controller@e0000000 {
> > +        compatible = "intel,rcu-lgm";
> > +        reg = <0xe0000000 0x20000>;
> > +        intel,global-reset = <0x10 30>;
> > +        #reset-cells = <2>;
> > +    };
> > +
> > +    pwm: pwm@e0d00000 {
> > +        status = "disabled";
> > +        compatible = "intel,lgm-pwm";
> > +        reg = <0xe0d00000 0x30>;
> > +        clocks = <&cgu0 1>;
> > +        #pwm-cells = <2>;
> > +        resets = <&rcu0 0x30 21>;
> > +    };
> > --
> > 2.11.0