Re: [PATCH v2 02/12] irqchip: Add Aspeed SCU interrupt controller

From: Andrew Jeffery
Date: Tue Dec 10 2019 - 19:30:31 EST




On Fri, 6 Dec 2019, at 03:45, Eddie James wrote:
> The Aspeed SOCs provide some interrupts through the System Control
> Unit registers. Add an interrupt controller that provides these
> interrupts to the system.
>
> Signed-off-by: Eddie James <eajames@xxxxxxxxxxxxx>

Reviewed-by: Andrew Jeffery <andrew@xxxxxxxx>