Re: [PATCH v2 03/12] ARM: dts: aspeed: ast2500: Add SCU interrupt controller

[Andrew Jeffery]

On Fri, 6 Dec 2019, at 03:45, Eddie James wrote:
> Add a node for the interrupt controller provided by the SCU.
> 
> Signed-off-by: Eddie James <eajames@xxxxxxxxxxxxx>
> ---
>  arch/arm/boot/dts/aspeed-g5.dtsi | 10 +++++++++-
>  1 file changed, 9 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi
> index a259c63..df44022 100644
> --- a/arch/arm/boot/dts/aspeed-g5.dtsi
> +++ b/arch/arm/boot/dts/aspeed-g5.dtsi
> @@ -216,8 +216,9 @@
>  			syscon: syscon@1e6e2000 {
>  				compatible = "aspeed,ast2500-scu", "syscon", "simple-mfd";
>  				reg = <0x1e6e2000 0x1a8>;
> +				ranges = <0 0x1e6e2000 0x1a8>;
>  				#address-cells = <1>;
> -				#size-cells = <0>;
> +				#size-cells = <1>;

You're no-longer adding a reg property to the interrupt controller node below so the
hunk above is unnecessary.

Andrew

>  				#clock-cells = <1>;
>  				#reset-cells = <1>;
>  
> @@ -231,6 +232,13 @@
>  					compatible = "aspeed,ast2500-p2a-ctrl";
>  					status = "disabled";
>  				};
> +
> +				scu_ic: interrupt-controller@18 {
> +					#interrupt-cells = <1>;
> +					compatible = "aspeed,ast2500-scu-ic";
> +					interrupts = <21>;
> +					interrupt-controller;
> +				};
>  			};
>  
>  			rng: hwrng@1e6e2078 {
> -- 
> 1.8.3.1
> 
>