Re: [PATCH 1/4] phy: qcom-qmp: Increase the phy init timeout

From: Vinod Koul
Date: Thu Dec 19 2019 - 10:40:17 EST


On 19-12-19, 08:29, Jeffrey Hugo wrote:
> On Thu, Dec 19, 2019 at 8:04 AM Vinod Koul <vkoul@xxxxxxxxxx> wrote:
> >
> > If we do full reset of the phy, it seems to take a couple of ms to come
> > up on my system so increase the timeout to 10ms.
> >
> > This was found by full reset addition by commit 870b1279c7a0
> > ("scsi: ufs-qcom: Add reset control support for host controller") and
> > fixes the regression to platforms by this commit.
> >
> > Suggested-by: Can Guo <cang@xxxxxxxxxxxxxx>
> > Signed-off-by: Vinod Koul <vkoul@xxxxxxxxxx>
>
> Reviewed-by: Jeffrey Hugo <jeffrey.l.hugo@xxxxxxxxx>
> Tested-by: Jeffrey Hugo <jeffrey.l.hugo@xxxxxxxxx>
>
> Tested on the Lenovo Miix 630 laptop (a msm8998 based system). This
> addresses the regression.

Thanks Jeff for quick test and reviews! Appreciate it.

> > ---
> > drivers/phy/qualcomm/phy-qcom-qmp.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c b/drivers/phy/qualcomm/phy-qcom-qmp.c
> > index 091e20303a14..c2e800a3825a 100644
> > --- a/drivers/phy/qualcomm/phy-qcom-qmp.c
> > +++ b/drivers/phy/qualcomm/phy-qcom-qmp.c
> > @@ -66,7 +66,7 @@
> > /* QPHY_V3_PCS_MISC_CLAMP_ENABLE register bits */
> > #define CLAMP_EN BIT(0) /* enables i/o clamp_n */
> >
> > -#define PHY_INIT_COMPLETE_TIMEOUT 1000
> > +#define PHY_INIT_COMPLETE_TIMEOUT 100000
> > #define POWER_DOWN_DELAY_US_MIN 10
> > #define POWER_DOWN_DELAY_US_MAX 11
> >
> > --
> > 2.23.0
> >

--
~Vinod