Re: [PATCH v2 3/3] clk: qcom: Add modem clock controller driver for SC7180

[Taniya Das]

Hi Sibi,

Thanks for your review.

On 12/27/2019 12:50 PM, Sibi Sankar wrote:
> Hey Taniya,

> > Âstatic const struct qcom_reset_map gcc_sc7180_resets[] = {
> > diff --git a/drivers/clk/qcom/mss-sc7180.c 
> > b/drivers/clk/qcom/mss-sc7180.c
> > new file mode 100644
> > index 0000000..24c38dc
> > --- /dev/null
> > +++ b/drivers/clk/qcom/mss-sc7180.c
> > @@ -0,0 +1,94 @@
> > +// SPDX-License-Identifier: GPL-2.0-only
> > +/*
> > + * Copyright (c) 2019, The Linux Foundation. All rights reserved.
> > + */
> > +
> > +#include <linux/clk-provider.h>
> > +#include <linux/platform_device.h>
> > +#include <linux/module.h>
> > +#include <linux/of_address.h>
> > +#include <linux/regmap.h>
> > +
> > +#include <dt-bindings/clock/qcom,mss-sc7180.h>
> > +
> > +#include "clk-regmap.h"
> > +#include "clk-branch.h"
> > +#include "common.h"
> > +
> > +static struct clk_branch mss_axi_nav_clk = {
> > +ÂÂÂ .halt_reg = 0xbc,
>
> if we use the entire mpss_perph
> reg space it should be 0x20bc
> instead.
>
> > +ÂÂÂ .halt_check = BRANCH_HALT,
> > +ÂÂÂ .clkr = {
> > +ÂÂÂÂÂÂÂ .enable_reg = 0xbc,
>
> 0x20bc

yes, will take care in the next patch.

> > +ÂÂÂÂÂÂÂ .enable_mask = BIT(0),
> > +ÂÂÂÂÂÂÂ .hw.init = &(struct clk_init_data){
> > +ÂÂÂÂÂÂÂÂÂÂÂ .name = "mss_axi_nav_clk",
> > +ÂÂÂÂÂÂÂÂÂÂÂ .ops = &clk_branch2_ops,
> > +ÂÂÂÂÂÂÂ },
> > +ÂÂÂ },
> > +};
> > +
> > +static struct clk_branch mss_axi_crypto_clk = {
> > +ÂÂÂ .halt_reg = 0xcc,
>
> if we use the entire mpss_perph
> reg space it should be 0x20cc
> instead.
>
> > +ÂÂÂ .halt_check = BRANCH_HALT,
> > +ÂÂÂ .clkr = {
> > +ÂÂÂÂÂÂÂ .enable_reg = 0xcc,
>
> 0x20cc

same as above.

> > +ÂÂÂÂÂÂÂ .enable_mask = BIT(0),
> > +ÂÂÂÂÂÂÂ .hw.init = &(struct clk_init_data){
> > +ÂÂÂÂÂÂÂÂÂÂÂ .name = "mss_axi_crypto_clk",
> > +ÂÂÂÂÂÂÂÂÂÂÂ .ops = &clk_branch2_ops,
> > +ÂÂÂÂÂÂÂ },
> > +ÂÂÂ },
> > +};
> > +
> > +static struct regmap_config mss_regmap_config = {
> > +ÂÂÂ .reg_bitsÂÂÂ = 32,
> > +ÂÂÂ .reg_strideÂÂÂ = 4,
> > +ÂÂÂ .val_bitsÂÂÂ = 32,
> > +ÂÂÂ .fast_ioÂÂÂ = true,
> > +};
> > +
> > +static struct clk_regmap *mss_sc7180_clocks[] = {
> > +ÂÂÂ [MSS_AXI_CRYPTO_CLK] = &mss_axi_crypto_clk.clkr,
> > +ÂÂÂ [MSS_AXI_NAV_CLK] = &mss_axi_nav_clk.clkr,
> > +};
> > +
> > +static const struct qcom_cc_desc mss_sc7180_desc = {
> > +ÂÂÂ .config = &mss_regmap_config,
> > +ÂÂÂ .clks = mss_sc7180_clocks,
> > +ÂÂÂ .num_clks = ARRAY_SIZE(mss_sc7180_clocks),
> > +};
> > +
> > +static int mss_sc7180_probe(struct platform_device *pdev)
> > +{
> > +ÂÂÂ return qcom_cc_probe(pdev, &mss_sc7180_desc);
>
> Similar to turingcc-qcs404 and q6sstop-qcs404
> shouldn't we model the iface clk dependency
> here since both the above clocks cant be turned
> on/off without it.

Could we skip and proceed with the above for now?

> > +}
> > +
> > +static const struct of_device_id mss_sc7180_match_table[] = {
> > +ÂÂÂ { .compatible = "qcom,sc7180-mss" },
> > +ÂÂÂ { }
> > +};
> > +MODULE_DEVICE_TABLE(of, mss_sc7180_match_table);
> > +
> > +static struct platform_driver mss_sc7180_driver = {
> > +ÂÂÂ .probeÂÂÂÂÂÂÂ = mss_sc7180_probe,
> > +ÂÂÂ .driverÂÂÂÂÂÂÂ = {
> > +ÂÂÂÂÂÂÂ .nameÂÂÂÂÂÂÂ = "sc7180-mss",
> > +ÂÂÂÂÂÂÂ .of_match_table = mss_sc7180_match_table,
> > +ÂÂÂ },
> > +};
> > +
> > +static int __init mss_sc7180_init(void)
> > +{
> > +ÂÂÂ return platform_driver_register(&mss_sc7180_driver);
> > +}
> > +subsys_initcall(mss_sc7180_init);
> > +
> > +static void __exit mss_sc7180_exit(void)
> > +{
> > +ÂÂÂ platform_driver_unregister(&mss_sc7180_driver);
> > +}
> > +module_exit(mss_sc7180_exit);
> > +
> > +MODULE_DESCRIPTION("QTI MSS SC7180 Driver");
> > +MODULE_LICENSE("GPL v2");
> > --
> > Qualcomm INDIA, on behalf of Qualcomm Innovation Center, Inc.is a member
> > of the Code Aurora Forum, hosted by the Linux Foundation.

--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation.

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