Re: [RESEND v6 06/13] spi: imx: fix ERR009165

From: Sascha Hauer
Date: Tue Mar 10 2020 - 03:39:44 EST


On Tue, Mar 10, 2020 at 07:31:55PM +0800, Robin Gong wrote:
> Change to XCH mode even in dma mode, please refer to the below
> errata:
> https://www.nxp.com/docs/en/errata/IMX6DQCE.pdf
>
> Signed-off-by: Robin Gong <yibin.gong@xxxxxxx>
> Acked-by: Mark Brown <broonie@xxxxxxxxxx>
> ---
> drivers/spi/spi-imx.c | 17 ++++++++++-------
> 1 file changed, 10 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/spi/spi-imx.c b/drivers/spi/spi-imx.c
> index f4f28a4..842a86e 100644
> --- a/drivers/spi/spi-imx.c
> +++ b/drivers/spi/spi-imx.c
> @@ -585,8 +585,9 @@ static int mx51_ecspi_prepare_transfer(struct spi_imx_data *spi_imx,
> ctrl |= mx51_ecspi_clkdiv(spi_imx, t->speed_hz, &clk);
> spi_imx->spi_bus_clk = clk;
>
> + /* ERR009165: work in XHC mode as PIO */
> if (spi_imx->usedma)
> - ctrl |= MX51_ECSPI_CTRL_SMC;
> + ctrl &= ~MX51_ECSPI_CTRL_SMC;

'ctrl' was read from the hardware. In the dma case it was set
explicitly, but it was never cleared for a PIO transfer. This looked
wrong before this patch. Now with this patch it looks even more wrong:
We clear a bit that has never been set and we only do this for DMA, when
for the PIO case it definitly must be cleared. Drop the if clause.

>
> writel(ctrl, spi_imx->base + MX51_ECSPI_CTRL);
>
> @@ -612,12 +613,14 @@ static int mx51_ecspi_prepare_transfer(struct spi_imx_data *spi_imx,
>
> static void mx51_setup_wml(struct spi_imx_data *spi_imx)
> {
> + u32 tx_wml = 0;
> +
> /*
> * Configure the DMA register: setup the watermark
> * and enable DMA request.
> */
> writel(MX51_ECSPI_DMA_RX_WML(spi_imx->wml - 1) |
> - MX51_ECSPI_DMA_TX_WML(spi_imx->wml) |
> + MX51_ECSPI_DMA_TX_WML(tx_wml) |

tx_wml is never assigned any other value than 0. Drop the variable.

> MX51_ECSPI_DMA_RXT_WML(spi_imx->wml) |
> MX51_ECSPI_DMA_TEDEN | MX51_ECSPI_DMA_RXDEN |
> MX51_ECSPI_DMA_RXTDEN, spi_imx->base + MX51_ECSPI_DMA);
> @@ -1171,7 +1174,11 @@ static int spi_imx_dma_configure(struct spi_master *master)
> tx.direction = DMA_MEM_TO_DEV;
> tx.dst_addr = spi_imx->base_phys + MXC_CSPITXDATA;
> tx.dst_addr_width = buswidth;
> - tx.dst_maxburst = spi_imx->wml;
> + /*
> + * For ERR009165 with tx_wml = 0 could enlarge burst size to fifo size
> + * to speed up fifo filling as possible.
> + */
> + tx.dst_maxburst = spi_imx->devtype_data->fifo_size;
> ret = dmaengine_slave_config(master->dma_tx, &tx);
> if (ret) {
> dev_err(spi_imx->dev, "TX dma configuration failed with %d\n", ret);
> @@ -1265,10 +1272,6 @@ static int spi_imx_sdma_init(struct device *dev, struct spi_imx_data *spi_imx,
> {
> int ret;
>
> - /* use pio mode for i.mx6dl chip TKT238285 */
> - if (of_machine_is_compatible("fsl,imx6dl"))
> - return 0;

So with this patch it becomes possible to do DMA on i.MX6dl, but it is
mentioned nowhere.

Sascha

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