[PATCH v8 04/11] irqchip: Add driver for Loongson-3 HyperTransport PIC controller

[Jiaxun Yang]

This controller appeared on Loongson-3 family of chips to receive
interrupts from PCH PIC.
It is a I8259 with optimized interrupt polling flow. We can poll
interrupt number from HT vector directly but still have to follow
standard I8259 routines to mask, unmask and EOI.

Signed-off-by: Jiaxun Yang <jiaxun.yang@xxxxxxxxxxx>
Co-developed-by: Huacai Chen <chenhc@xxxxxxxxxx>
Signed-off-by: Huacai Chen <chenhc@xxxxxxxxxx>
Reviewed-by: Marc Zyngier <maz@xxxxxxxxxx>

---
v4-v5:
	Enhancements according to maz's suggestions:
		- Add static for private struct
		- Drop pointless rename
		- Fix DT parse bug
		- Clarifications in comments and commit message
v5-v6:
	Check parent_irq = 0 case.
---
 arch/mips/include/asm/i8259.h        |   1 +
 drivers/irqchip/Kconfig              |  10 ++
 drivers/irqchip/Makefile             |   1 +
 drivers/irqchip/irq-loongson-htpic.c | 149 +++++++++++++++++++++++++++
 4 files changed, 161 insertions(+)
 create mode 100644 drivers/irqchip/irq-loongson-htpic.c

diff --git a/arch/mips/include/asm/i8259.h b/arch/mips/include/asm/i8259.h
index 97a5e41ed1ab..a54b9649de22 100644
--- a/arch/mips/include/asm/i8259.h
+++ b/arch/mips/include/asm/i8259.h
@@ -36,6 +36,7 @@ extern raw_spinlock_t i8259A_lock;
 extern void make_8259A_irq(unsigned int irq);
 
 extern void init_i8259_irqs(void);
+extern struct irq_domain *__init_i8259_irqs(struct device_node *node);
 
 /**
  * i8159_set_poll() - Override the i8259 polling function
diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
index c609eaa319d2..cae6f480c987 100644
--- a/drivers/irqchip/Kconfig
+++ b/drivers/irqchip/Kconfig
@@ -522,4 +522,14 @@ config LOONGSON_LIOINTC
 	help
 	  Support for the Loongson Local I/O Interrupt Controller.
 
+config LOONGSON_HTPIC
+	bool "Loongson3 HyperTransport PIC Controller"
+	depends on MACH_LOONGSON64
+	default y
+	select IRQ_DOMAIN
+	select GENERIC_IRQ_CHIP
+	select I8259
+	help
+	  Support for the Loongson-3 HyperTransport PIC Controller.
+
 endmenu
diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile
index 5e7678efdfe6..37bbe39bf909 100644
--- a/drivers/irqchip/Makefile
+++ b/drivers/irqchip/Makefile
@@ -106,3 +106,4 @@ obj-$(CONFIG_LS1X_IRQ)			+= irq-ls1x.o
 obj-$(CONFIG_TI_SCI_INTR_IRQCHIP)	+= irq-ti-sci-intr.o
 obj-$(CONFIG_TI_SCI_INTA_IRQCHIP)	+= irq-ti-sci-inta.o
 obj-$(CONFIG_LOONGSON_LIOINTC)		+= irq-loongson-liointc.o
+obj-$(CONFIG_LOONGSON_HTPIC)		+= irq-loongson-htpic.o
diff --git a/drivers/irqchip/irq-loongson-htpic.c b/drivers/irqchip/irq-loongson-htpic.c
new file mode 100644
index 000000000000..dd018c22ea83
--- /dev/null
+++ b/drivers/irqchip/irq-loongson-htpic.c
@@ -0,0 +1,149 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ *  Copyright (C) 2020, Jiaxun Yang <jiaxun.yang@xxxxxxxxxxx>
+ *  Loongson HTPIC IRQ support
+ */
+
+#include <linux/init.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <linux/irqchip.h>
+#include <linux/irqchip/chained_irq.h>
+#include <linux/irq.h>
+#include <linux/io.h>
+#include <linux/syscore_ops.h>
+
+#include <asm/i8259.h>
+
+#define HTPIC_MAX_PARENT_IRQ	4
+#define HTINT_NUM_VECTORS	8
+#define HTINT_EN_OFF		0x20
+
+struct loongson_htpic {
+	void __iomem *base;
+	struct irq_domain *domain;
+};
+
+static struct loongson_htpic *htpic;
+
+static void htpic_irq_dispatch(struct irq_desc *desc)
+{
+	struct loongson_htpic *priv = irq_desc_get_handler_data(desc);
+	struct irq_chip *chip = irq_desc_get_chip(desc);
+	uint32_t pending;
+
+	chained_irq_enter(chip, desc);
+	pending = readl(priv->base);
+	/* Ack all IRQs at once, otherwise IRQ flood might happen */
+	writel(pending, priv->base);
+
+	if (!pending)
+		spurious_interrupt();
+
+	while (pending) {
+		int bit = __ffs(pending);
+
+		if (unlikely(bit > 15)) {
+			spurious_interrupt();
+			break;
+		}
+
+		generic_handle_irq(irq_linear_revmap(priv->domain, bit));
+		pending &= ~BIT(bit);
+	}
+	chained_irq_exit(chip, desc);
+}
+
+static void htpic_reg_init(void)
+{
+	int i;
+
+	for (i = 0; i < HTINT_NUM_VECTORS; i++) {
+		uint32_t val;
+
+		/* Disable all HT Vectors */
+		writel(0x0, htpic->base + HTINT_EN_OFF + i * 0x4);
+		val = readl(htpic->base + i * 0x4);
+		/* Ack all possible pending IRQs */
+		writel(GENMASK(31, 0), htpic->base + i * 0x4);
+	}
+
+	/* Enable 16 vectors for PIC */
+	writel(0xffff, htpic->base + HTINT_EN_OFF);
+}
+
+static void htpic_resume(void)
+{
+	htpic_reg_init();
+}
+
+struct syscore_ops htpic_syscore_ops = {
+	.resume		= htpic_resume,
+};
+
+int __init htpic_of_init(struct device_node *node, struct device_node *parent)
+{
+	unsigned int parent_irq[4];
+	int i, err;
+	int num_parents = 0;
+
+	if (htpic) {
+		pr_err("loongson-htpic: Only one HTPIC is allowed in the system\n");
+		return -ENODEV;
+	}
+
+	htpic = kzalloc(sizeof(*htpic), GFP_KERNEL);
+	if (!htpic) {
+		err = -ENOMEM;
+		goto out_free;
+	}
+
+	htpic->base = of_iomap(node, 0);
+	if (!htpic->base) {
+		err = -ENODEV;
+		goto out_free;
+	}
+
+	htpic->domain = __init_i8259_irqs(node);
+	if (!htpic->domain) {
+		pr_err("loongson-htpic: Failed to initialize i8259 IRQs\n");
+		err = -ENOMEM;
+		goto out_iounmap;
+	}
+
+	/* Interrupt may come from any of the 4 interrupt line */
+	for (i = 0; i < HTPIC_MAX_PARENT_IRQ; i++) {
+		parent_irq[i] = irq_of_parse_and_map(node, i);
+		if (parent_irq[i] <= 0)
+			break;
+
+		num_parents++;
+	}
+
+	if (!num_parents) {
+		pr_err("loongson-htpic: Failed to get parent irqs\n");
+		err = -ENODEV;
+		goto out_remove_domain;
+	}
+
+	htpic_reg_init();
+
+	for (i = 0; i < num_parents; i++) {
+		irq_set_chained_handler_and_data(parent_irq[i],
+						htpic_irq_dispatch, htpic);
+	}
+
+	register_syscore_ops(&htpic_syscore_ops);
+
+	return 0;
+
+out_remove_domain:
+	irq_domain_remove(htpic->domain);
+out_iounmap:
+	iounmap(htpic->base);
+out_free:
+	kfree(htpic);
+	return err;
+}
+
+IRQCHIP_DECLARE(loongson_htpic, "loongson,htpic-1.0", htpic_of_init);
-- 
2.26.0.rc2