Re: [PATCH v10 3/5] mfd: Add support for the MediaTek MT6358 PMIC

From: Lee Jones
Date: Wed Mar 25 2020 - 05:42:44 EST

On Wed, 11 Mar 2020, Hsin-Hsiung Wang wrote:

> This adds support for the MediaTek MT6358 PMIC. This is a
> multifunction device with the following sub modules:
>
> - Regulator
> - RTC
> - Codec
> - Interrupt
>
> It is interfaced to the host controller using SPI interface
> by a proprietary hardware called PMIC wrapper or pwrap.
> MT6358 MFD is a child device of the pwrap.
>
> Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@xxxxxxxxxxxx>
> ---
> drivers/mfd/Makefile | 2 +-
> drivers/mfd/mt6358-irq.c | 236 +++++++++++++++++++++++++++++
> drivers/mfd/mt6397-core.c | 55 ++++++-
> include/linux/mfd/mt6358/core.h | 158 ++++++++++++++++++++
> include/linux/mfd/mt6358/registers.h | 282 +++++++++++++++++++++++++++++++++++
> include/linux/mfd/mt6397/core.h | 3 +
> 6 files changed, 731 insertions(+), 5 deletions(-)
> create mode 100644 drivers/mfd/mt6358-irq.c
> create mode 100644 include/linux/mfd/mt6358/core.h
> create mode 100644 include/linux/mfd/mt6358/registers.h
>
> diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
> index b83f172..9af1414 100644
> --- a/drivers/mfd/Makefile
> +++ b/drivers/mfd/Makefile
> @@ -238,7 +238,7 @@ obj-$(CONFIG_INTEL_SOC_PMIC) += intel-soc-pmic.o
> obj-$(CONFIG_INTEL_SOC_PMIC_BXTWC) += intel_soc_pmic_bxtwc.o
> obj-$(CONFIG_INTEL_SOC_PMIC_CHTWC) += intel_soc_pmic_chtwc.o
> obj-$(CONFIG_INTEL_SOC_PMIC_CHTDC_TI) += intel_soc_pmic_chtdc_ti.o
> -mt6397-objs := mt6397-core.o mt6397-irq.o
> +mt6397-objs := mt6397-core.o mt6397-irq.o mt6358-irq.o
> obj-$(CONFIG_MFD_MT6397) += mt6397.o
> obj-$(CONFIG_INTEL_SOC_PMIC_MRFLD) += intel_soc_pmic_mrfld.o
>
> diff --git a/drivers/mfd/mt6358-irq.c b/drivers/mfd/mt6358-irq.c
> new file mode 100644
> index 0000000..022e5f5
> --- /dev/null
> +++ b/drivers/mfd/mt6358-irq.c
> @@ -0,0 +1,236 @@
> +// SPDX-License-Identifier: GPL-2.0
> +//
> +// Copyright (c) 2019 MediaTek Inc.

This is out of date.

> +#include <linux/interrupt.h>
> +#include <linux/mfd/mt6358/core.h>
> +#include <linux/mfd/mt6358/registers.h>
> +#include <linux/mfd/mt6397/core.h>
> +#include <linux/module.h>
> +#include <linux/of.h>
> +#include <linux/of_device.h>
> +#include <linux/of_irq.h>
> +#include <linux/platform_device.h>
> +#include <linux/regmap.h>
> +
> +static struct irq_top_t mt6358_ints[] = {
> + MT6358_TOP_GEN(BUCK),
> + MT6358_TOP_GEN(LDO),
> + MT6358_TOP_GEN(PSC),
> + MT6358_TOP_GEN(SCK),
> + MT6358_TOP_GEN(BM),
> + MT6358_TOP_GEN(HK),
> + MT6358_TOP_GEN(AUD),
> + MT6358_TOP_GEN(MISC),
> +};
> +
> +static void pmic_irq_enable(struct irq_data *data)
> +{
> + unsigned int hwirq = irqd_to_hwirq(data);
> + struct mt6397_chip *chip = irq_data_get_irq_chip_data(data);

6397?

This does make me wonder how different this file is to the existing
support for the MT6397. What is the justification for not extending
that instead of creating a brand new file?

> + struct pmic_irq_data *irqd = chip->irq_data;
> +
> + irqd->enable_hwirq[hwirq] = true;
> +}
> +
> +static void pmic_irq_disable(struct irq_data *data)
> +{
> + unsigned int hwirq = irqd_to_hwirq(data);
> + struct mt6397_chip *chip = irq_data_get_irq_chip_data(data);
> + struct pmic_irq_data *irqd = chip->irq_data;
> +
> + irqd->enable_hwirq[hwirq] = false;
> +}
> +
> +static void pmic_irq_lock(struct irq_data *data)
> +{
> + struct mt6397_chip *chip = irq_data_get_irq_chip_data(data);
> +
> + mutex_lock(&chip->irqlock);
> +}
> +
> +static void pmic_irq_sync_unlock(struct irq_data *data)
> +{
> + unsigned int i, top_gp, gp_offset, en_reg, int_regs, shift;
> + struct mt6397_chip *chip = irq_data_get_irq_chip_data(data);
> + struct pmic_irq_data *irqd = chip->irq_data;
> +
> + for (i = 0; i < irqd->num_pmic_irqs; i++) {
> + if (irqd->enable_hwirq[i] == irqd->cache_hwirq[i])
> + continue;
> +
> + /* Find out the IRQ group */
> + top_gp = 0;
> + while ((top_gp + 1) < irqd->num_top &&
> + i >= mt6358_ints[top_gp + 1].hwirq_base)
> + top_gp++;
> +
> + /* Find the irq registers */

Nit: "IRQ"

> + gp_offset = i - mt6358_ints[top_gp].hwirq_base;
> + int_regs = gp_offset / MT6358_REG_WIDTH;
> + shift = gp_offset % MT6358_REG_WIDTH;
> + en_reg = mt6358_ints[top_gp].en_reg +
> + (mt6358_ints[top_gp].en_reg_shift * int_regs);
> +
> + regmap_update_bits(chip->regmap, en_reg, BIT(shift),
> + irqd->enable_hwirq[i] << shift);
> +
> + irqd->cache_hwirq[i] = irqd->enable_hwirq[i];
> + }
> + mutex_unlock(&chip->irqlock);
> +}

[...]

> +int mt6358_irq_init(struct mt6397_chip *chip)
> +{
> + int i, j, ret;
> + struct pmic_irq_data *irqd;
> +
> + irqd = devm_kzalloc(chip->dev, sizeof(struct pmic_irq_data *),

sizeof(*irqd)

[...]

> static const struct chip_data mt6397_core = {
> .cid_addr = MT6397_CID,
> .cid_shift = 0,
> @@ -154,19 +184,33 @@ static int mt6397_probe(struct platform_device *pdev)
> if (pmic->irq <= 0)
> return pmic->irq;
>
> - ret = mt6397_irq_init(pmic);
> - if (ret)
> - return ret;
> -
> switch (pmic->chip_id) {
> case MT6323_CHIP_ID:
> + ret = mt6397_irq_init(pmic);
> + if (ret)
> + return ret;
> +
> ret = devm_mfd_add_devices(&pdev->dev, PLATFORM_DEVID_NONE,
> mt6323_devs, ARRAY_SIZE(mt6323_devs),
> NULL, 0, pmic->irq_domain);
> break;
>
> + case MT6358_CHIP_ID:
> + ret = mt6358_irq_init(pmic);
> + if (ret)
> + return ret;
> +
> + ret = devm_mfd_add_devices(&pdev->dev, PLATFORM_DEVID_NONE,
> + mt6358_devs, ARRAY_SIZE(mt6358_devs),
> + NULL, 0, pmic->irq_domain);

In a subsequent patch you can choose the correct mtXXXX_devs structure
to pass and call devm_mfd_add_devices() only once below the switch().

> + break;
> +
> case MT6391_CHIP_ID:
> case MT6397_CHIP_ID:
> + ret = mt6397_irq_init(pmic);
> + if (ret)
> + return ret;
> +
> ret = devm_mfd_add_devices(&pdev->dev, PLATFORM_DEVID_NONE,
> mt6397_devs, ARRAY_SIZE(mt6397_devs),
> NULL, 0, pmic->irq_domain);

[...]

--
Lee Jones [æçæ]
Linaro Services Technical Lead
Linaro.org â Open source software for ARM SoCs
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