[PATCH v2 4/5] MIPS: DTS: Loongson64: Add PCI Controller Node
From: Jiaxun Yang
Date: Tue Mar 31 2020 - 23:12:57 EST
Add PCI Host controller node for Loongson64 with RS780E PCH dts.
Note that PCI interrupts are probed via legacy way, as different
machine have different interrupt arrangement, we can't cover all
of them in dt.
Signed-off-by: Jiaxun Yang <jiaxun.yang@xxxxxxxxxxx>
--
v2: Clean-up
---
arch/mips/boot/dts/loongson/rs780e-pch.dtsi | 17 ++++++++++++++++-
1 file changed, 16 insertions(+), 1 deletion(-)
diff --git a/arch/mips/boot/dts/loongson/rs780e-pch.dtsi b/arch/mips/boot/dts/loongson/rs780e-pch.dtsi
index 45c54d555fa4..8766f97306c6 100644
--- a/arch/mips/boot/dts/loongson/rs780e-pch.dtsi
+++ b/arch/mips/boot/dts/loongson/rs780e-pch.dtsi
@@ -5,10 +5,25 @@ bus@10000000 {
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
- ranges = <0 0x10000000 0 0x10000000 0 0x10000000
+ ranges = <0 0x00000000 0 0x00000000 0 0x00010000 /* ioports */
+ 0 0x10000000 0 0x10000000 0 0x10000000
0 0x40000000 0 0x40000000 0 0x40000000
0xfd 0xfe000000 0xfd 0xfe000000 0 0x2000000 /* PCI Config Space */>;
+ pci@1a000000 {
+ compatible = "loongson,rs780e-pci";
+ device_type = "pci";
+ #address-cells = <3>;
+ #size-cells = <2>;
+
+ reg = <0 0x1a000000 0 0x02000000>;
+
+ ranges = <0x01000000 0 0x00004000 0 0x00004000 0 0x00004000>,
+ <0x02000000 0 0x40000000 0 0x40000000 0 0x40000000>;
+
+ bus-range = <0x00 0xff>;
+ };
+
isa {
compatible = "isa";
#address-cells = <2>;
--
2.26.0.rc2