On Tue, Mar 24, 2020 at 5:46 PM Jishnu Prakash <jprakash@xxxxxxxxxxxxxx> wrote:I'll fix this and the other simple changes in the next post.
The ADC architecture on PMIC7 is changed as compared to PMIC5. The...
major change from PMIC5 is that all SW communication to ADC goes through
PMK8350, which communicates with other PMICs through PBS when the ADC
on PMK8350 works in master mode. The SID register is used to identify the
PMICs with which the PBS needs to communicate. Add support for the same.
In addition, add definitions for ADC channels and virtual channel
definitions per PMIC, to be used by ADC clients for PMIC7.
+#define ADC_CHANNEL_OFFSET 0x8GENMASK()
+#define ADC_CHANNEL_MASK 0xff
I'm not sure what you mean by this. It is used in the API adc7_do_conversion.
...
+#define ADC_APP_SID 0x40GENMASK()
+#define ADC_APP_SID_MASK 0xf
+#define ADC7_CONV_TIMEOUT msecs_to_jiffies(10)Useless.
...I'll remove the check for the compatible string, using driver data, in the next post.
+ if (of_device_is_compatible(node, "qcom,spmi-adc7")) {
+ indio_dev->info = &adc7_info;Hmm... I would rather put this as driver_data in ID structure(s).
+ adc->is_pmic7 = true;
+ } else {
+ indio_dev->info = &adc5_info;
+ }
The driver does use an IRQ. Will fix this in the next post.
...
+static int adc5_exit(struct platform_device *pdev)Are you sure you will have no race conditions? Does this driver use IRQs?
+{
+ struct adc5_chip *adc = platform_get_drvdata(pdev);
+
+ mutex_destroy(&adc->lock);