Re: [PATCH v2 1/2] iio: adc: ti-ads8344: properly byte swap value

[Andy Shevchenko]

On Thu, Apr 16, 2020 at 11:55 PM Alexandre Belloni
<alexandre.belloni@xxxxxxxxxxx> wrote:
>
> The first received byte is the MSB, followed by the LSB so the value needs
> to be byte swapped.
>
> Also, the ADC actually has a delay of one clock on the SPI bus. Read three
> bytes to get the last bit.
>

Can you show example of what is read and what is expected to be a correct value?
Because it seems I have been reported with similar issue on other TI
ADC chip [1]. Perhaps we have to fix all of them?

[1]: https://github.com/edison-fw/meta-intel-edison/issues/108

> Fixes: 8dd2d7c0fed7 ("iio: adc: Add driver for the TI ADS8344 A/DC chips")
> Signed-off-by: Alexandre Belloni <alexandre.belloni@xxxxxxxxxxx>
> ---
>  drivers/iio/adc/ti-ads8344.c | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/iio/adc/ti-ads8344.c b/drivers/iio/adc/ti-ads8344.c
> index 9a460807d46d..abe4b56c847c 100644
> --- a/drivers/iio/adc/ti-ads8344.c
> +++ b/drivers/iio/adc/ti-ads8344.c
> @@ -29,7 +29,7 @@ struct ads8344 {
>         struct mutex lock;
>
>         u8 tx_buf ____cacheline_aligned;
> -       u16 rx_buf;
> +       u8 rx_buf[3];
>  };
>
>  #define ADS8344_VOLTAGE_CHANNEL(chan, si)                              \
> @@ -89,11 +89,11 @@ static int ads8344_adc_conversion(struct ads8344 *adc, int channel,
>
>         udelay(9);
>
> -       ret = spi_read(spi, &adc->rx_buf, 2);
> +       ret = spi_read(spi, adc->rx_buf, sizeof(adc->rx_buf));
>         if (ret)
>                 return ret;
>
> -       return adc->rx_buf;
> +       return adc->rx_buf[0] << 9 | adc->rx_buf[1] << 1 | adc->rx_buf[2] >> 7;
>  }
>
>  static int ads8344_read_raw(struct iio_dev *iio,
> --
> 2.25.2
>


-- 
With Best Regards,
Andy Shevchenko