Re: [PATCH v2 1/2] iio: adc: ti-ads8344: properly byte swap value

[Andy Shevchenko]

On Fri, Apr 17, 2020 at 1:44 PM Andy Shevchenko
<andy.shevchenko@xxxxxxxxx> wrote:
>
> On Thu, Apr 16, 2020 at 11:55 PM Alexandre Belloni
> <alexandre.belloni@xxxxxxxxxxx> wrote:
> >
> > The first received byte is the MSB, followed by the LSB so the value needs
> > to be byte swapped.
> >
> > Also, the ADC actually has a delay of one clock on the SPI bus. Read three
> > bytes to get the last bit.
> >
>
> Can you show example of what is read and what is expected to be a correct value?
> Because it seems I have been reported with similar issue on other TI
> ADC chip [1]. Perhaps we have to fix all of them?
>
> [1]: https://github.com/edison-fw/meta-intel-edison/issues/108

Also, forgot to mention that TI ADC are 16 bit word, so, we need to
read two u16 rather then bytes.

Some configuration won't allow to do byte reads.

> > Fixes: 8dd2d7c0fed7 ("iio: adc: Add driver for the TI ADS8344 A/DC chips")
> > Signed-off-by: Alexandre Belloni <alexandre.belloni@xxxxxxxxxxx>

-- 
With Best Regards,
Andy Shevchenko