Re: [PATCH v2 2/3] soc: sifive: Add SiFive specific Cadence DDR controller driver

From: Christoph Hellwig
Date: Mon Sep 07 2020 - 02:11:38 EST


On Mon, Sep 07, 2020 at 11:17:58AM +0530, Yash Shah wrote:
> Add a driver to manage the Cadence DDR controller present on SiFive SoCs
> At present the driver manages the EDAC feature of the DDR controller.
> Additional features may be added to the driver in future to control
> other aspects of the DDR controller.

So if this is a generic(ish) Cadence IP block shouldn't it be named
Cadence and made generic? Or is the frontend somehow SiFive specific?