Re: [RESEND PATCH v3 1/3] dt-bindings: pinctrl: Add bindings for pinctrl-mchp-sgpio driver

[Lars Povlsen]

Hi Rob!

Rob Herring writes:

> On Tue, Oct 06, 2020 at 04:25:30PM +0200, Lars Povlsen wrote:
>> This adds DT bindings for the Microsemi/Microchip SGPIO controller,
>> bindings microchip,sparx5-sgpio, mscc,ocelot-sgpio and
>> mscc,luton-sgpio.
>>
>> Signed-off-by: Lars Povlsen <lars.povlsen@xxxxxxxxxxxxx>
>> ---
>>  .../pinctrl/microchip,sparx5-sgpio.yaml       | 127 ++++++++++++++++++
>>  1 file changed, 127 insertions(+)
>>  create mode 100644 Documentation/devicetree/bindings/pinctrl/microchip,sparx5-sgpio.yaml
>>
>> diff --git a/Documentation/devicetree/bindings/pinctrl/microchip,sparx5-sgpio.yaml b/Documentation/devicetree/bindings/pinctrl/microchip,sparx5-sgpio.yaml
>> new file mode 100644
>> index 000000000000..e3618ed28165
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/pinctrl/microchip,sparx5-sgpio.yaml
>> @@ -0,0 +1,127 @@
>> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/pinctrl/microchip,sparx5-sgpio.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: Microsemi/Microchip Serial GPIO controller
>> +
>> +maintainers:
>> +  - Lars Povlsen <lars.povlsen@xxxxxxxxxxxxx>
>> +
>> +description: |
>> +  By using a serial interface, the SIO controller significantly extend
>> +  the number of available GPIOs with a minimum number of additional
>> +  pins on the device. The primary purpose of the SIO controllers is to
>> +  connect control signals from SFP modules and to act as an LED
>> +  controller.
>> +
>> +properties:
>> +  $nodename:
>> +    pattern: "^gpio@[0-9a-f]+$"
>> +
>> +  compatible:
>> +    enum:
>> +      - microchip,sparx5-sgpio
>> +      - mscc,ocelot-sgpio
>> +      - mscc,luton-sgpio
>> +
>> +  "#address-cells":
>> +    const: 1
>> +
>> +  "#size-cells":
>> +    const: 0
>> +
>> +  reg:
>> +    maxItems: 1
>> +
>> +  clocks:
>> +    maxItems: 1
>> +
>> +  microchip,sgpio-port-ranges:
>> +    description: This is a sequence of tuples, defining intervals of
>> +      enabled ports in the serial input stream. The enabled ports must
>> +      match the hardware configuration in order for signals to be
>> +      properly written/read to/from the controller holding
>> +      registers. Being tuples, then number of arguments must be
>> +      even. The tuples mast be ordered (low, high) and are
>> +      inclusive. Arguments must be between 0 and 31.
>> +    $ref: /schemas/types.yaml#/definitions/uint32-array
>> +    minItems: 2
>> +    maxItems: 64
>> +
>> +  microchip,sgpio-frequency:
>> +    description: The sgpio controller frequency (Hz). This dictates
>> +      the serial bitstream speed, which again affects the latency in
>> +      getting control signals back and forth between external shift
>> +      registers. The speed must be no larger than half the system
>> +      clock, and larger than zero.
>> +    $ref: /schemas/types.yaml#/definitions/uint32
>> +    minimum: 1
>> +    default: 12500000
>> +
>> +patternProperties:
>> +  "^gpio-(port|controller)@[01]$":
>
> gpio@... is correct here as the node is a gpio-controller (no, we're
> not consistent).

OK, fine by me.

>
>> +    type: object
>> +    properties:
>> +      compatible:
>> +        const: microchip,sparx5-sgpio-bank
>> +
>> +      reg:
>> +        maxItems: 1
>> +
>> +      gpio-controller: true
>> +
>> +      '#gpio-cells':
>> +        const: 3
>> +
>> +      ngpios:
>> +        minimum: 1
>> +        maximum: 128
>> +
>> +    required:
>> +      - compatible
>> +      - reg
>> +      - gpio-controller
>> +      - '#gpio-cells'
>> +      - ngpios
>> +
>> +    additionalProperties: false
>> +
>> +additionalProperties: false
>> +
>> +required:
>> +  - compatible
>> +  - reg
>> +  - clocks
>> +  - microchip,sgpio-port-ranges
>> +  - "#address-cells"
>> +  - "#size-cells"
>> +
>> +examples:
>> +  - |
>> +    sgpio2: gpio@1101059c {
>> +     #address-cells = <1>;
>> +     #size-cells = <0>;
>> +     compatible = "microchip,sparx5-sgpio";
>> +     clocks = <&sys_clk>;
>> +     pinctrl-0 = <&sgpio2_pins>;
>> +     pinctrl-names = "default";
>> +     reg = <0x1101059c 0x100>;
>> +        microchip,sgpio-port-ranges = <0 0 16 18 28 31>;
>
> Since it's tuples, do:
>
> <0 0>, <16 18>, <28 31>

Yes, that will add clarity.

>
>> +        microchip,sgpio-frequency = <25000000>;
>
> Some whitespace issues here.
>

Will fix that.

>
>> +     sgpio_in2: gpio-controller@0 {
>> +            reg = <0>;
>> +            compatible = "microchip,sparx5-sgpio-bank";
>> +            gpio-controller;
>> +            #gpio-cells = <3>;
>> +            ngpios = <96>;
>> +     };
>> +     sgpio_out2: gpio-controller@1 {
>> +            compatible = "microchip,sparx5-sgpio-bank";
>> +            reg = <1>;
>> +            gpio-controller;
>> +            #gpio-cells = <3>;
>> +            ngpios = <96>;
>> +     };
>> +    };
>> --
>> 2.25.1

Thank you for your comments, I will refresh the series shortly.

---Lars

-- 
Lars Povlsen,
Microchip