Re: [PATCH v1] pinctrl: intel: Add Intel Alder Lake pin controller support

[Mika Westerberg]

Hi,

I think the $subject should say "Alder Lake-S" as this is for -S
variant.

On Mon, Oct 26, 2020 at 09:25:52PM +0200, Andy Shevchenko wrote:
> This driver adds pinctrl/GPIO support for Intel Alder Lake SoC. The
> GPIO controller is based on the next generation GPIO hardware but still
> compatible with the one supported by the Intel core pinctrl/GPIO driver.
> 
> Signed-off-by: Andy Shevchenko <andriy.shevchenko@xxxxxxxxxxxxxxx>
> ---
>  drivers/pinctrl/intel/Kconfig             |   9 +
>  drivers/pinctrl/intel/Makefile            |   1 +
>  drivers/pinctrl/intel/pinctrl-alderlake.c | 437 ++++++++++++++++++++++
>  3 files changed, 447 insertions(+)
>  create mode 100644 drivers/pinctrl/intel/pinctrl-alderlake.c
> 
> diff --git a/drivers/pinctrl/intel/Kconfig b/drivers/pinctrl/intel/Kconfig
> index b9d78a4187e0..98494c8fdaf8 100644
> --- a/drivers/pinctrl/intel/Kconfig
> +++ b/drivers/pinctrl/intel/Kconfig
> @@ -70,6 +70,14 @@ config PINCTRL_INTEL
>  	select GPIOLIB
>  	select GPIOLIB_IRQCHIP
>  
> +config PINCTRL_ALDERLAKE
> +	tristate "Intel Alder Lake pinctrl and GPIO driver"
> +	depends on ACPI
> +	select PINCTRL_INTEL
> +	help
> +	  This pinctrl driver provides an interface that allows configuring
> +	  of Intel Alder Lake PCH pins and using them as GPIOs.
> +
>  config PINCTRL_BROXTON
>  	tristate "Intel Broxton pinctrl and GPIO driver"
>  	depends on ACPI
> @@ -158,4 +166,5 @@ config PINCTRL_TIGERLAKE
>  	help
>  	  This pinctrl driver provides an interface that allows configuring
>  	  of Intel Tiger Lake PCH pins and using them as GPIOs.
> +

Is this intentional ws change?

>  endif

Otherwise looks good to me.