Re: [PATCH v2 03/11] perf c2c: Add dimensions for load miss

[Namhyung Kim]

On Sun, Dec 13, 2020 at 10:39 PM Leo Yan <leo.yan@xxxxxxxxxx> wrote:
>
> Add dimensions for load miss and its percentage calculation, which is to
> be displayed in the single cache line output.
>
> Signed-off-by: Leo Yan <leo.yan@xxxxxxxxxx>
> ---
>  tools/perf/builtin-c2c.c | 107 +++++++++++++++++++++++++++++++++++++++
>  1 file changed, 107 insertions(+)
>
> diff --git a/tools/perf/builtin-c2c.c b/tools/perf/builtin-c2c.c
> index 00014e3d81fa..27745340c14a 100644
> --- a/tools/perf/builtin-c2c.c
> +++ b/tools/perf/builtin-c2c.c
> @@ -624,6 +624,10 @@ tot_hitm_cmp(struct perf_hpp_fmt *fmt __maybe_unused,
>          (stats)->rmt_hitm +            \
>          (stats)->rmt_hit)
>
> +#define TOT_LD_MISS(stats)             \
> +       ((stats)->lcl_dram +            \
> +        (stats)->rmt_dram)
> +

Is this true always?  I'm not sure if there's a case where stores can go to DRAM
directly.. maybe like a kind of uncached accesses.

Also it can be a static function..

Thanks,
Namhyung