Re: [PATCH v4 1/4] riscv: Remove CONFIG_PHYS_RAM_BASE_FIXED
From: Palmer Dabbelt
Date: Sat Jun 12 2021 - 20:26:54 EST
On Sat, 12 Jun 2021 16:23:03 PDT (-0700), emil.renner.berthing@xxxxxxxxx wrote:
On Fri, 4 Jun 2021 at 13:51, Alexandre Ghiti <alex@xxxxxxxx> wrote:
Make the physical RAM base address available for all kernels, not only
XIP kernels as it will allow to simplify address conversions macros.
Am I just reading it wrong or won't this patch make it so that the same kernel
can't run on two chips with physical ram starting at different addresses?
IIUC we were in that position, at least without relocatable kernels.
Maybe I'm misunderstanding this, though?
/Emil
---
arch/riscv/Kconfig | 6 ------
1 file changed, 6 deletions(-)
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index b58596b141fc..3d8e7e4bb45c 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -493,13 +493,8 @@ config STACKPROTECTOR_PER_TASK
def_bool y
depends on STACKPROTECTOR && CC_HAVE_STACKPROTECTOR_TLS
-config PHYS_RAM_BASE_FIXED
- bool "Explicitly specified physical RAM address"
- default n
-
config PHYS_RAM_BASE
hex "Platform Physical RAM address"
- depends on PHYS_RAM_BASE_FIXED
default "0x80000000"
help
This is the physical address of RAM in the system. It has to be
@@ -512,7 +507,6 @@ config XIP_KERNEL
# This prevents XIP from being enabled by all{yes,mod}config, which
# fail to build since XIP doesn't support large kernels.
depends on !COMPILE_TEST
- select PHYS_RAM_BASE_FIXED
help
Execute-In-Place allows the kernel to run from non-volatile storage
directly addressable by the CPU, such as NOR flash. This saves RAM
--
2.30.2
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