Re: [irqchip: irq/irqchip-next] irqdomain: Protect the linear revmap with RCU

From: Guenter Roeck
Date: Tue Jul 06 2021 - 10:43:05 EST

On 7/6/21 2:24 AM, Marc Zyngier wrote:
On Mon, 05 Jul 2021 21:36:36 +0100,
Guenter Roeck <linux@xxxxxxxxxxxx> wrote:

On 7/5/21 11:43 AM, Marc Zyngier wrote:

It definitely helps, and confirms my hunch. With the patch below, I'm
not getting the warnings anymore. I'm pretty sure a number of other
MIPS systems suffer from similar issues, which I'll address similarly.

Please let me know if that addresses the issue on your end.

Yes, it does. Feel free to add

Tested-by: Guenter Roeck <linux@xxxxxxxxxxxx>

to the real patch.


Now the big question: Why does this only affect 32-bit little endian
mips images, but not the matching big endian images, nor 64-bit images ?

Actually they do.

Are you sure these images are using the exact same HW? A bunch (most?)
of MIPS systems do not use irqdomains in their root interrupt
handling, so this issue wouldn't be visible (irq_enter() will already
have been done for the chained interrupt handling).

FWIW, I can reproduce the problem by switching your mipsel config to
BE, and adding this patch fixes it.

Yes, turns out I did not have the necessary debugging options enabled
in my other mips tests.