Re: [PATCH v2] perf/x86/amd: Don't touch the AMD64_EVENTSEL_HOSTONLY bit inside the guest

[Liam Merwick]

On (08/02/21 15:08), Like Xu wrote:
> Date:   Mon,  2 Aug 2021 15:08:50 +0800
> From: Like Xu <like.xu.linux@xxxxxxxxx>
> To: Peter Zijlstra <peterz@xxxxxxxxxxxxx>, Joerg Roedel
>  <joerg.roedel@xxxxxxx>
> Cc: Ingo Molnar <mingo@xxxxxxxxxx>, Arnaldo Carvalho de Melo
>  <acme@xxxxxxxxxx>, Mark Rutland <mark.rutland@xxxxxxx>, Alexander Shishkin
>  <alexander.shishkin@xxxxxxxxxxxxxxx>, Jiri Olsa <jolsa@xxxxxxxxxx>,
>  Namhyung Kim <namhyung@xxxxxxxxxx>, Thomas Gleixner <tglx@xxxxxxxxxxxxx>,
>  Borislav Petkov <bp@xxxxxxxxx>, x86@xxxxxxxxxx, "H . Peter Anvin"
>  <hpa@xxxxxxxxx>, linux-perf-users@xxxxxxxxxxxxxxx,
>  linux-kernel@xxxxxxxxxxxxxxx
> Subject: [PATCH v2] perf/x86/amd: Don't touch the AMD64_EVENTSEL_HOSTONLY
>  bit inside the guest
> X-Mailer: git-send-email 2.32.0
> 
> From: Like Xu <likexu@xxxxxxxxxxx>
> 
> If we use "perf record" in an AMD Milan guest, dmesg reports a #GP
> warning from an unchecked MSR access error on MSR_F15H_PERF_CTLx:
> 
> [] unchecked MSR access error: WRMSR to 0xc0010200 (tried to write
> 0x0000020000110076) at rIP: 0xffffffff8106ddb4 (native_write_msr+0x4/0x20)
> [] Call Trace:
> []  amd_pmu_disable_event+0x22/0x90
> []  x86_pmu_stop+0x4c/0xa0
> []  x86_pmu_del+0x3a/0x140
> 
> The AMD64_EVENTSEL_HOSTONLY bit is defined and used on the host,
> while the guest perf driver should avoid such use.
> 
> Fixes: 1018faa6cf23 ("perf/x86/kvm: Fix Host-Only/Guest-Only counting with SVM disabled")
> Signed-off-by: Like Xu <likexu@xxxxxxxxxxx>
> Tested-by: Kim Phillips <kim.phillips@xxxxxxx>

Reviewed-by: Liam Merwick <liam.merwick@xxxxxxxxxx>
Tested-by: Liam Merwick <liam.merwick@xxxxxxxxxx>
[ Patch applied to a 5.4 branch ]

Should it also include

Cc: stable@xxxxxxxxxxxxxxx

Regards,
Liam

> ---
> v2: Add Fixes tag and Tested-by from Kim.
> v1: https://lore.kernel.org/lkml/20210720112605.63286-1-likexu@xxxxxxxxxxx/
> 
>  arch/x86/events/perf_event.h | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/x86/events/perf_event.h b/arch/x86/events/perf_event.h
> index d6003e08b055..1c3ae954a230 100644
> --- a/arch/x86/events/perf_event.h
> +++ b/arch/x86/events/perf_event.h
> @@ -1116,8 +1116,9 @@ void x86_pmu_stop(struct perf_event *event, int flags);
>  static inline void x86_pmu_disable_event(struct perf_event *event)
>  {
>  	struct hw_perf_event *hwc = &event->hw;
> +	u64 disable_mask = __this_cpu_read(cpu_hw_events.perf_ctr_virt_mask);
>  
> -	wrmsrl(hwc->config_base, hwc->config);
> +	wrmsrl(hwc->config_base, hwc->config & ~disable_mask);
>  
>  	if (is_counter_pair(hwc))
>  		wrmsrl(x86_pmu_config_addr(hwc->idx + 1), 0);
> -- 
> 2.32.0
>