Re: [PATCH v2] perf/x86/amd: Don't touch the AMD64_EVENTSEL_HOSTONLY bit inside the guest

[Peter Zijlstra]

On Wed, Aug 04, 2021 at 12:28:54PM +0100, Liam Merwick wrote:
> On (08/02/21 15:08), Like Xu wrote:

> > From: Like Xu <likexu@xxxxxxxxxxx>
> > 
> > If we use "perf record" in an AMD Milan guest, dmesg reports a #GP
> > warning from an unchecked MSR access error on MSR_F15H_PERF_CTLx:
> > 
> > [] unchecked MSR access error: WRMSR to 0xc0010200 (tried to write
> > 0x0000020000110076) at rIP: 0xffffffff8106ddb4 (native_write_msr+0x4/0x20)
> > [] Call Trace:
> > []  amd_pmu_disable_event+0x22/0x90
> > []  x86_pmu_stop+0x4c/0xa0
> > []  x86_pmu_del+0x3a/0x140
> > 
> > The AMD64_EVENTSEL_HOSTONLY bit is defined and used on the host,
> > while the guest perf driver should avoid such use.
> > 
> > Fixes: 1018faa6cf23 ("perf/x86/kvm: Fix Host-Only/Guest-Only counting with SVM disabled")
> > Signed-off-by: Like Xu <likexu@xxxxxxxxxxx>
> > Tested-by: Kim Phillips <kim.phillips@xxxxxxx>
> 
> Reviewed-by: Liam Merwick <liam.merwick@xxxxxxxxxx>
> Tested-by: Liam Merwick <liam.merwick@xxxxxxxxxx>
> [ Patch applied to a 5.4 branch ]
> 
> Should it also include
> 
> Cc: stable@xxxxxxxxxxxxxxx

An accurate Fixes tag is usually sufficient to trigger the stable
robots. Anyway, thanks!