Re: QCA6174 pcie wifi: Add pci quirks

[Ingmar Klein]

Am 21.08.2021 um 01:22 schrieb Pali Rohár:
> On Wednesday 21 July 2021 10:54:53 Pali Rohár wrote:
> > On Tuesday 25 May 2021 17:12:15 Bjorn Helgaas wrote:
> > > On Thu, Apr 15, 2021 at 09:53:38PM +0200, Pali Rohár wrote:
> > > > Hello!
> > > >
> > > > On Thursday 15 April 2021 13:01:19 Alex Williamson wrote:
> > > > > [cc +Pali]
> > > > >
> > > > > On Thu, 15 Apr 2021 20:02:23 +0200
> > > > > Ingmar Klein <ingmar_klein@xxxxxx> wrote:
> > > > >
> > > > > > First thanks to you both, Alex and Bjorn!
> > > > > > I am in no way an expert on this topic, so I have to fully rely on your
> > > > > > feedback, concerning this issue.
> > > > > >
> > > > > > If you should have any other solution approach, in form of patch-set, I
> > > > > > would be glad to test it out. Just let me know, what you think might
> > > > > > make sense.
> > > > > > I will wait for your further feedback on the issue. In the meantime I
> > > > > > have my current workaround via quirk entry.
> > > > > >
> > > > > > By the way, my layman's question:
> > > > > > Do you think, that the following topic might also apply for the QCA6174?
> > > > > > https://www.spinics.net/lists/linux-pci/msg106395.html
> > > > I have been testing more ath cards and I'm going to send a new version
> > > > of this patch with including more PCI ids.
> > > Dropping this patch in favor of Pali's new version.
> > Hello Bjorn! Seems that it would take much more time to finish my
> > version of patch. So could you take Ingmar's patch with cc:stable tag
> > for now, which just adds PCI device id into list of problematic devices?
> Ping, gentle reminder...

Hi Pali and Bjorn,

here is the original trivial patch again.
For the moment, this could do.

Thank you!
Best regards,
Ingmar

Signed-off-by: Ingmar Klein <ingmar_klein@xxxxxx>

diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 706f27a86a8e..ecfe80ec5b9c 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -3584,6 +3584,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x0032, quirk_no_bus_reset);
 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x003c, quirk_no_bus_reset);
 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x0033, quirk_no_bus_reset);
 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x0034, quirk_no_bus_reset);
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x003e, quirk_no_bus_reset);
 
 /*
  * Root port on some Cavium CN8xxx chips do not successfully complete a bus