Re: [tip:locking/core] tools/memory-model: Add extra ordering for locks and remove it for ordinary release/acquire

[Alan Stern]

On Thu, Sep 09, 2021 at 10:02:13AM -0700, Linus Torvalds wrote:
> On Thu, Sep 9, 2021 at 6:35 AM Will Deacon <will@xxxxxxxxxx> wrote:
> >
> > I don't think we should require the accesses to the actual lockwords to
> > be ordered here, as it becomes pretty onerous for relaxed LL/SC
> > architectures where you'd end up with an extra barrier either after the
> > unlock() or before the lock() operation. However, I remain absolutely in
> > favour of strengthening the ordering of the _critical sections_ guarded by
> > the locks to be RCsc.
> 
> Ack. The actual locking operations themselves can obviously overlap,
> it's what they protect that should be ordered if at all possible.
> 
> Because anything else will be too confusing for words, and if we have
> to add memory barriers *and* locking we're just screwed.
> 
> Because I think it is entirely understandable for people to expect
> that sequence of two locked regions to be ordered wrt each other.
> 
> While memory ordering is subtle and confusing, we should strive to
> make our "..but I used locks" to be as straightforward and as
> understandable to people who really really don't want to even think
> about memory order as at all reasonable.
> 
> I think we should have a very strong reason for accepting unordered
> locked regions (with "strong reason" being defined as "on this
> architecture that is hugely important, anything else would slow down
> locks enormously").
> 
> It sounds like no such architecture exists, much less is important.

All right.

Currently the memory model has RCtso ordering of accesses in separate 
critical sections for the same lock, as observed by other CPUs not 
holding the lock.  Peter is proposing (and Linus agrees) to expand this 
to cover critical sections for different locks, so long as both critical 
sections are on the same CPU.  But he didn't propose strengthening the 
ordering to RCsc, and I presume we don't want to do this because of the 
slowdown it would incur on Power.

Does everyone agree that this correctly summarizes the change to be made 
to the memory model?

Alan