Re: [PATCH] dt-bindings: interrupt-controller: sifive, plic: Fix number of interrupts

[Jessica Clarke]

On 25 Nov 2021, at 15:22, Geert Uytterhoeven <geert@xxxxxxxxxxxxxx> wrote:
> 
> To improve human readability and enable automatic validation, the tuples
> in "interrupts-extended" properties should be grouped using angle
> brackets.  As the DT bindings lack an upper bound on the number of
> interrupts, thus assuming one, proper grouping is currently flagged as
> an error.
> 
> Fix this by adding the missing "maxItems", limiting it to 9 interrupts
> (one interrupt for a system management core, and two interrupts per core
> for other cores), which should be sufficient for now.

This is SiFive’s IP, so is this actually true? I would imagine it’s
just parameterised and could be generated with as many targets as fit
in the MMIO space, and that this is thus inaccurate. Besides, such a
function change should be made separately from the grouping change.

The same goes for your equivalent sifive,clint0 patch.

Jess

> Group the tuples in the example.
> 
> Signed-off-by: Geert Uytterhoeven <geert@xxxxxxxxxxxxxx>
> ---
> .../interrupt-controller/sifive,plic-1.0.0.yaml      | 12 ++++++------
> 1 file changed, 6 insertions(+), 6 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml b/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml
> index 08d5a57ce00ff446..198b373f984f3438 100644
> --- a/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml
> +++ b/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml
> @@ -61,6 +61,7 @@ properties:
> 
>   interrupts-extended:
>     minItems: 1
> +    maxItems: 9
>     description:
>       Specifies which contexts are connected to the PLIC, with "-1" specifying
>       that a context is not present. Each node pointed to should be a
> @@ -89,12 +90,11 @@ examples:
>       #interrupt-cells = <1>;
>       compatible = "sifive,fu540-c000-plic", "sifive,plic-1.0.0";
>       interrupt-controller;
> -      interrupts-extended = <
> -        &cpu0_intc 11
> -        &cpu1_intc 11 &cpu1_intc 9
> -        &cpu2_intc 11 &cpu2_intc 9
> -        &cpu3_intc 11 &cpu3_intc 9
> -        &cpu4_intc 11 &cpu4_intc 9>;
> +      interrupts-extended = <&cpu0_intc 11>,
> +                            <&cpu1_intc 11>, <&cpu1_intc 9>,
> +                            <&cpu2_intc 11>, <&cpu2_intc 9>,
> +                            <&cpu3_intc 11>, <&cpu3_intc 9>,
> +                            <&cpu4_intc 11>, <&cpu4_intc 9>;
>       reg = <0xc000000 0x4000000>;
>       riscv,ndev = <10>;
>     };
> -- 
> 2.25.1
> 
> 
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