Re: [PATCH v1 2/2] i2c: designware-pci: Set ideal timing parameters for Elkhart Lake PSE

[Andy Shevchenko]

On Tue, Nov 30, 2021 at 11:14:57AM +0200, Andy Shevchenko wrote:
> On Mon, Nov 29, 2021 at 05:57:03PM +0100, Wolfram Sang wrote:
> > On Tue, Nov 09, 2021 at 04:05:52PM +0530, lakshmi.sowjanya.d@xxxxxxxxx wrote:
> > > From: Lakshmi Sowjanya D <lakshmi.sowjanya.d@xxxxxxxxx>
> > > 
> > > Set optimal HCNT, LCNT and hold time values for all the speeds supported
> > > in Intel Programmable Service Engine I2C controller in Intel Elkhart
> > > Lake.
> > > 
> > > Signed-off-by: Lakshmi Sowjanya D <lakshmi.sowjanya.d@xxxxxxxxx>
> > 
> > Applied to for-next, thanks!
> 
> Oh là là! Can we revert these, please?
> 
> After the commit 64d0a0755c7d ("i2c: designware: Read counters from ACPI for
> PCI driver") the PCI driver should get this from ACPI tables, no hard coding
> needed anymore. I did that series to address this very issue.
> 
> So, Lakshmi, please ask for BIOS fix as we discussed long time ago.

For the record, I have just checked the DSDT dump I have from
Elkhart Lake machine and BIOS provides those counters for devices
\_SB.PCI0.I2C0 .. \_SB.PCI0.I2C5 (6 devices altogether).

So, BIOS is quite aware of the interface and patches are not needed.
I rather add a comment there that these tables in the driver shouldn't
be spread and expanded anymore (at least by Intel).

-- 
With Best Regards,
Andy Shevchenko