Re: [PATCH] tty: serial: Use fifo in 8250 console driver

From: Jon Hunter
Date: Tue Jan 25 2022 - 05:13:04 EST



On 25/01/2022 09:36, Jiri Slaby wrote:

...

The test is bogus:
         use_fifo = (up->capabilities & UART_CAP_FIFO) &&
                 port->fifosize > 1 &&
                 (serial_port_in(port, UART_FCR) & UART_FCR_ENABLE_FIFO)

FCR is write only. Reading it, one gets IIR contents.

In particular, the test is checking whether there is no interrupt pending (UART_FCR_ENABLE_FIFO == UART_IIR_NO_INT). So it oscillates between use_fifo and not, depending on the interrupt state of the chip.

Could you change it into something like this:
--- a/drivers/tty/serial/8250/8250_port.c
+++ b/drivers/tty/serial/8250/8250_port.c
@@ -3396,7 +3396,7 @@ void serial8250_console_write(struct uart_8250_port *up, const char *s,

        use_fifo = (up->capabilities & UART_CAP_FIFO) &&
                port->fifosize > 1 &&
-               (serial_port_in(port, UART_FCR) & UART_FCR_ENABLE_FIFO) &&
+               (up->fcr & UART_FCR_ENABLE_FIFO) &&
                /*
                 * After we put a data in the fifo, the controller will send
                 * it regardless of the CTS state. Therefore, only use fifo


And see whether it fixes the issue. Anyway, of what port type is the serial port (what says dmesg/setserial about that)?


Thanks. Unfortunately, this did not fix it. The port type is PORT_TEGRA ...

70006000.serial: ttyS0 at MMIO 0x70006000 (irq = 72, base_baud = 25500000) is a Tegra

Jon

--
nvpublic