Re: [PATCH v2 0/2] PCI: xgene: Restore working PCIe functionnality

[Robin Murphy]

On 2022-03-22 14:39, Rob Herring wrote:
> On Tue, Mar 22, 2022 at 01:16:35PM +0000, Robin Murphy wrote:
> > On 2022-03-21 20:06, Robin Murphy wrote:
> > > On 2022-03-21 19:21, Marc Zyngier wrote:
> > > > On Mon, 21 Mar 2022 18:03:27 +0000,
> > > > Rob Herring <robh@xxxxxxxxxx> wrote:
> > > > > On Mon, Mar 21, 2022 at 11:36 AM Marc Zyngier <maz@xxxxxxxxxx> wrote:
> > > > > > On Mon, 21 Mar 2022 15:17:34 +0000,
> > > > > > Rob Herring <robh@xxxxxxxxxx> wrote:
> > > > > > > On Mon, Mar 21, 2022 at 5:49 AM Marc Zyngier <maz@xxxxxxxxxx> wrote:
> > > > > > > >
> > > > > > > For XGene-1, I'd still like to understand what the issue is. Reverting
> > > > > > > the first fix and fixing 'dma-ranges' should have fixed it. I need a
> > > > > > > dump of how the IB registers are initialized in both cases. I'm not
> > > > > > > saying changing 'dma-ranges' in the firmware is going to be required
> > > > > > > here. There's a couple of other ways we could fix that without a
> > > > > > > firmware change, but first I need to understand why it broke.
> > > > > >
> > > > > > Reverting 6dce5aa59e0b was enough for me, without changing anything
> > > > > > else.
> > > > >
> > > > > Meaning c7a75d07827a didn't matter for you. I'm not sure that it would.
> > > > >
> > > > > Can you tell me what 'dma-ranges' contains on your system?
> > > >
> > > > Each pcie node (all 5 of them) has:
> > > >
> > > > dma-ranges = <0x42000000 0x80 0x00 0x80 0x00 0x00 0x80000000
> > > > �������������� 0x42000000 0x00 0x00 0x00 0x00 0x80 0x00>;
>
> This is the same as what St�phane has for Merlin. So c7a75d07827a ("PCI:
> xgene: Fix IB window setup") should have fixed Mustang.

Unless XGene 1 has some weird implicit requirement on the order in which 
the registers are programmed, that XGene 2 doesn't. And from looking at 
the code, I don't see any obvious less-mad possibility to explain the 
breakage.

> > > Hmm, is there anyone other than iommu-dma who actually depends on the
> > > resource list being sorted in ascending order of bus address? I recall
> > > at the time I pushed for creating the list in sorted order as it was the
> > > simplest and most efficient option, but there's no technical reason we
> > > couldn't create it in as-found order and defer the sorting until
> > > iova_reserve_pci_windows() (at worst that could even operate on a
> > > temporary copy if need be). It's just more code, which didn't need to
> > > exist without a good reason, but if this is one then exist it certainly
> > > may.
> >
> > Taking a closer look, the Cadence driver is already re-sorting the list
> > for its own setup, so iommu-dma can't assume the initial sort is
> > preserved and needs to do its own anyway. Does the (untested) diff below
> > end up helping X-Gene also?
>
> There's no IOMMU on X-Gene 1 or 2 based on the upstream dts files, so
> how would this matter?

Because devm_of_pci_get_host_bridge_resources() is forcing the 
dma_ranges list to be in a different order from the original DT for 
iommu-dma's benefit, but whether iommu-dma actually consumes it or not 
later is immaterial.

Robin.