Re: [PATCH net-next v2 1/1] net: phy: dp83867: retrigger SGMII AN when link change
From: Andrew Lunn
Date: Mon Jun 06 2022 - 08:43:33 EST
> Below is the HW structure for Intel mGbE controller with external PHY.
> The SERDES is located in the PHY IF in the diagram below and the EQoS
> MAC uses pcs-xpcs driver for SGMII interface.
>
> <-----------------GBE Controller---------->|<---External PHY chip--->
> +----------+ +----+ +---+ +------------+
> | EQoS | <-GMII->| DW | < ------ > |PHY| <-SGMII-> |External PHY|
> | MAC | |xPCS| |IF | |(TI DP83867)|
> +----------+ +----+ +---+ +------------+
> ^ ^ ^ ^
> | | | |
> +---------------------MDIO-------------------------+
>
> There are registers in the DW XPCS to read the SGMII AN status and
> it's showing the SGMII AN has not completed and link status is down.
> But TI PHY is showing SGMII AN is completed and the copper link is
> established.
>
> FYI, the current pcs-xpcs driver is configuring C37 SGMII as MAC-side
> SGMII, so it's expecting to receive AN Tx Config from PHY about the
> link state change after C28 AN is completed between PHY and Link Partner.
> Here is the pcs-xpcs code for your reference:
> https://elixir.bootlin.com/linux/latest/source/drivers/net/pcs/pcs-xpcs.c#L725
>
> We faced a similar issue on MaxLinear GPY PHY in the past.
> And, MaxLinear folks admitted the issue and implemented fixes/improvements
> in the GPY PHY Firmware to overcome the SGMII AN issue.
> Besides, they have also implemented this similar SW Workaround in their
> PHY driver code to cater for the old Firmware.
> Feel free to refer GPY driver code here:
> https://elixir.bootlin.com/linux/latest/source/drivers/net/phy/mxl-gpy.c#L222
>
> Apart from TI and MaxLinear PHY, we've also tested the Marvell 88E2110 and
> 88E1512 PHY with the MAC/SERDES combination above, Marvell PHY is working
> fine without any issue.
Thanks for the additional details.
Reviewed-by: Andrew Lunn <andrew@xxxxxxx>
Andrew