[PATCH V2 0/2] Add Xilinx DSI-Tx subsystem DRM driver

[Venkateshwar Rao Gannavarapu]

MIPI DSI TX subsystem allows you to quickly create systems based on the
MIPI protocol. It interfaces between the video processing subsystems and
MIPI-based displays. An internal high-speed physical layer design, D-PHY,
is provided to allow direct connection to display peripherals.

The subsystem consists of the following sub-blocks:
- MIPI D-PHY
- MIPI DSI TX Controller
- AXI Crossbar

Please refer pg238 [1].

The DSI TX Controller receives stream of image data through an input stream
interface. At design time, this subsystem can be configured to number of lanes
and pixel format.

This patch series adds the dt-binding and DRM driver for Xilinx DSI-Tx soft IP.

Changes in V2:
    - Rebased on 5.19 kernel
    - Moved mode_set functionality to atomic_enable as its deprecrated
    - Mask fixes
    - Replaced panel calls with bridge API's
    - Added mandatory atomic operations
    - Removed unnecessary logging
    - Added ARCH_ZYNQMP dependency in Kconfig
    - Fixed YAML warnings
    - Cleanup

Venkateshwar Rao Gannavarapu (2):
  dt-bindings: display: xlnx: Add DSI 2.0 Tx subsystem documentation
  drm: xlnx: dsi: Add Xilinx MIPI DSI-Tx subsystem driver

 .../bindings/display/xlnx/xlnx,dsi-tx.yaml         | 101 +++++
 drivers/gpu/drm/xlnx/Kconfig                       |  12 +
 drivers/gpu/drm/xlnx/Makefile                      |   1 +
 drivers/gpu/drm/xlnx/xlnx_dsi.c                    | 429 +++++++++++++++++++++
 4 files changed, 543 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/display/xlnx/xlnx,dsi-tx.yaml
 create mode 100644 drivers/gpu/drm/xlnx/xlnx_dsi.c

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1.8.3.1