[PATCH v3 07/13] regulator: qcom_spmi: Sort pmics alphabetically (part 1)
From: Iskren Chernev
Date: Sun Jul 31 2022 - 18:38:34 EST
The sorting is split in multiple commits for easier reviewing.
Signed-off-by: Iskren Chernev <iskren.chernev@xxxxxxxxx>
---
drivers/regulator/qcom_spmi-regulator.c | 74 ++++++++++++-------------
1 file changed, 37 insertions(+), 37 deletions(-)
diff --git a/drivers/regulator/qcom_spmi-regulator.c b/drivers/regulator/qcom_spmi-regulator.c
index 19af294a6972..bbb464717afa 100644
--- a/drivers/regulator/qcom_spmi-regulator.c
+++ b/drivers/regulator/qcom_spmi-regulator.c
@@ -2026,43 +2026,6 @@ static int spmi_regulator_of_parse(struct device_node *node,
return 0;
}
-static const struct spmi_regulator_data pm8941_regulators[] = {
- { "s1", 0x1400, "vdd_s1", },
- { "s2", 0x1700, "vdd_s2", },
- { "s3", 0x1a00, "vdd_s3", },
- { "s4", 0xa000, },
- { "l1", 0x4000, "vdd_l1_l3", },
- { "l2", 0x4100, "vdd_l2_lvs_1_2_3", },
- { "l3", 0x4200, "vdd_l1_l3", },
- { "l4", 0x4300, "vdd_l4_l11", },
- { "l5", 0x4400, "vdd_l5_l7", NULL, 0x0410 },
- { "l6", 0x4500, "vdd_l6_l12_l14_l15", },
- { "l7", 0x4600, "vdd_l5_l7", NULL, 0x0410 },
- { "l8", 0x4700, "vdd_l8_l16_l18_19", },
- { "l9", 0x4800, "vdd_l9_l10_l17_l22", },
- { "l10", 0x4900, "vdd_l9_l10_l17_l22", },
- { "l11", 0x4a00, "vdd_l4_l11", },
- { "l12", 0x4b00, "vdd_l6_l12_l14_l15", },
- { "l13", 0x4c00, "vdd_l13_l20_l23_l24", },
- { "l14", 0x4d00, "vdd_l6_l12_l14_l15", },
- { "l15", 0x4e00, "vdd_l6_l12_l14_l15", },
- { "l16", 0x4f00, "vdd_l8_l16_l18_19", },
- { "l17", 0x5000, "vdd_l9_l10_l17_l22", },
- { "l18", 0x5100, "vdd_l8_l16_l18_19", },
- { "l19", 0x5200, "vdd_l8_l16_l18_19", },
- { "l20", 0x5300, "vdd_l13_l20_l23_l24", },
- { "l21", 0x5400, "vdd_l21", },
- { "l22", 0x5500, "vdd_l9_l10_l17_l22", },
- { "l23", 0x5600, "vdd_l13_l20_l23_l24", },
- { "l24", 0x5700, "vdd_l13_l20_l23_l24", },
- { "lvs1", 0x8000, "vdd_l2_lvs_1_2_3", },
- { "lvs2", 0x8100, "vdd_l2_lvs_1_2_3", },
- { "lvs3", 0x8200, "vdd_l2_lvs_1_2_3", },
- { "5vs1", 0x8300, "vin_5vs", "ocp-5vs1", },
- { "5vs2", 0x8400, "vin_5vs", "ocp-5vs2", },
- { }
-};
-
static const struct spmi_regulator_data pm8226_regulators[] = {
{ "s1", 0x1400, "vdd_s1", },
{ "s2", 0x1700, "vdd_s2", },
@@ -2139,6 +2102,43 @@ static const struct spmi_regulator_data pm8916_regulators[] = {
{ }
};
+static const struct spmi_regulator_data pm8941_regulators[] = {
+ { "s1", 0x1400, "vdd_s1", },
+ { "s2", 0x1700, "vdd_s2", },
+ { "s3", 0x1a00, "vdd_s3", },
+ { "s4", 0xa000, },
+ { "l1", 0x4000, "vdd_l1_l3", },
+ { "l2", 0x4100, "vdd_l2_lvs_1_2_3", },
+ { "l3", 0x4200, "vdd_l1_l3", },
+ { "l4", 0x4300, "vdd_l4_l11", },
+ { "l5", 0x4400, "vdd_l5_l7", NULL, 0x0410 },
+ { "l6", 0x4500, "vdd_l6_l12_l14_l15", },
+ { "l7", 0x4600, "vdd_l5_l7", NULL, 0x0410 },
+ { "l8", 0x4700, "vdd_l8_l16_l18_19", },
+ { "l9", 0x4800, "vdd_l9_l10_l17_l22", },
+ { "l10", 0x4900, "vdd_l9_l10_l17_l22", },
+ { "l11", 0x4a00, "vdd_l4_l11", },
+ { "l12", 0x4b00, "vdd_l6_l12_l14_l15", },
+ { "l13", 0x4c00, "vdd_l13_l20_l23_l24", },
+ { "l14", 0x4d00, "vdd_l6_l12_l14_l15", },
+ { "l15", 0x4e00, "vdd_l6_l12_l14_l15", },
+ { "l16", 0x4f00, "vdd_l8_l16_l18_19", },
+ { "l17", 0x5000, "vdd_l9_l10_l17_l22", },
+ { "l18", 0x5100, "vdd_l8_l16_l18_19", },
+ { "l19", 0x5200, "vdd_l8_l16_l18_19", },
+ { "l20", 0x5300, "vdd_l13_l20_l23_l24", },
+ { "l21", 0x5400, "vdd_l21", },
+ { "l22", 0x5500, "vdd_l9_l10_l17_l22", },
+ { "l23", 0x5600, "vdd_l13_l20_l23_l24", },
+ { "l24", 0x5700, "vdd_l13_l20_l23_l24", },
+ { "lvs1", 0x8000, "vdd_l2_lvs_1_2_3", },
+ { "lvs2", 0x8100, "vdd_l2_lvs_1_2_3", },
+ { "lvs3", 0x8200, "vdd_l2_lvs_1_2_3", },
+ { "5vs1", 0x8300, "vin_5vs", "ocp-5vs1", },
+ { "5vs2", 0x8400, "vin_5vs", "ocp-5vs2", },
+ { }
+};
+
static const struct spmi_regulator_data pm8950_regulators[] = {
{ "s1", 0x1400, "vdd_s1", },
{ "s2", 0x1700, "vdd_s2", },
--
2.37.1