Re: [PATCH v2] watchdog: meson: keep running if already active

[Guenter Roeck]

On 8/1/22 02:21, Philippe Boos wrote:
> If the watchdog is already running (e.g.: started by bootloader) then
> the kernel driver should keep the watchdog active but the amlogic driver
> turns it off.
>
> Let the driver fix the clock rate if already active because we do not
> know the previous timebase value. To avoid unintentional resetting we
> temporarily set it to its maximum value.
>
> Then keep the enable bit if is was previously active.
>
> Signed-off-by: Philippe Boos <pboos@xxxxxxxxxxxx>

What changed since v1 ?

Guenter

> ---
>   drivers/watchdog/meson_gxbb_wdt.c | 24 +++++++++++++++++++-----
>   1 file changed, 19 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/watchdog/meson_gxbb_wdt.c b/drivers/watchdog/meson_gxbb_wdt.c
> index 5a9ca10fbcfa..8be8fd9e5637 100644
> --- a/drivers/watchdog/meson_gxbb_wdt.c
> +++ b/drivers/watchdog/meson_gxbb_wdt.c
> @@ -146,6 +146,7 @@ static int meson_gxbb_wdt_probe(struct platform_device *pdev)
>   	struct device *dev = &pdev->dev;
>   	struct meson_gxbb_wdt *data;
>   	int ret;
> +	u32 ctrl_reg;
>   
>   	data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
>   	if (!data)
> @@ -177,13 +178,26 @@ static int meson_gxbb_wdt_probe(struct platform_device *pdev)
>   	data->wdt_dev.timeout = DEFAULT_TIMEOUT;
>   	watchdog_set_drvdata(&data->wdt_dev, data);
>   
> +	ctrl_reg = readl(data->reg_base + GXBB_WDT_CTRL_REG) &
> +				GXBB_WDT_CTRL_EN;
> +
> +	if (ctrl_reg) {
> +		/* Watchdog is running - keep it running but extend timeout
> +		 * to the maximum while setting the timebase
> +		 */
> +		set_bit(WDOG_HW_RUNNING, &data->wdt_dev.status);
> +		meson_gxbb_wdt_set_timeout(&data->wdt_dev,
> +				GXBB_WDT_TCNT_SETUP_MASK / 1000);
> +	}
> +
>   	/* Setup with 1ms timebase */
> -	writel(((clk_get_rate(data->clk) / 1000) & GXBB_WDT_CTRL_DIV_MASK) |
> -		GXBB_WDT_CTRL_EE_RESET |
> -		GXBB_WDT_CTRL_CLK_EN |
> -		GXBB_WDT_CTRL_CLKDIV_EN,
> -		data->reg_base + GXBB_WDT_CTRL_REG);
> +	ctrl_reg |= ((clk_get_rate(data->clk) / 1000) &
> +			GXBB_WDT_CTRL_DIV_MASK) |
> +			GXBB_WDT_CTRL_EE_RESET |
> +			GXBB_WDT_CTRL_CLK_EN |
> +			GXBB_WDT_CTRL_CLKDIV_EN;
>   
> +	writel(ctrl_reg, data->reg_base + GXBB_WDT_CTRL_REG);
>   	meson_gxbb_wdt_set_timeout(&data->wdt_dev, data->wdt_dev.timeout);
>   
>   	watchdog_stop_on_reboot(&data->wdt_dev);