From: Justin Chen <justinpopo6@xxxxxxxxx>
The BDC block requires the PLL lock in order to grab the PLL clock.
The phy auto-suspend feature turns off the phy when nothing is attached
leading to the PLL to not lock. This leads the BDC block to grab the AUX
clock instead of the PLL clock. This is not ideal, so lets turn this
Signed-off-by: Justin Chen <justinpopo6@xxxxxxxxx>
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