Re: [PATCH 10/10] arm64: dts: qcom: sm6350: Add apps_smmu with streamID to SDHCI 1/2 nodes

[Luca Weiss]

On Sun Oct 30, 2022 at 8:32 AM CET, Marijn Suijten wrote:
> When enabling the APPS SMMU the mainline driver reconfigures the SMMU
> from its bootloader configuration, loosing the stream mapping for (among
> which) the SDHCI hardware and breaking its ADMA feature.  This feature
> can be disabled with:
>
>     sdhci.debug_quirks=0x40
>
> But it is of course desired to have this feature enabled and working
> through the SMMU.
>
> Signed-off-by: Marijn Suijten <marijn.suijten@xxxxxxxxxxxxxx>

Reviewed-by: Luca Weiss <luca.weiss@xxxxxxxxxxxxx>
Tested-by: Luca Weiss <luca.weiss@xxxxxxxxxxxxx> # sm7225-fairphone-fp4

Regards
Luca

> ---
>  arch/arm64/boot/dts/qcom/sm6350.dtsi | 2 ++
>  1 file changed, 2 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi
> index b98b881ebe7e..c309a359ded9 100644
> --- a/arch/arm64/boot/dts/qcom/sm6350.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi
> @@ -485,6 +485,7 @@ sdhc_1: mmc@7c4000 {
>  			interrupts = <GIC_SPI 641 IRQ_TYPE_LEVEL_HIGH>,
>  				     <GIC_SPI 644 IRQ_TYPE_LEVEL_HIGH>;
>  			interrupt-names = "hc_irq", "pwr_irq";
> +			iommus = <&apps_smmu 0x60 0x0>;
>  
>  			clocks = <&gcc GCC_SDCC1_AHB_CLK>,
>  				 <&gcc GCC_SDCC1_APPS_CLK>,
> @@ -1064,6 +1065,7 @@ sdhc_2: mmc@8804000 {
>  			interrupts = <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
>  				     <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>;
>  			interrupt-names = "hc_irq", "pwr_irq";
> +			iommus = <&apps_smmu 0x560 0x0>;
>  
>  			clocks = <&gcc GCC_SDCC2_AHB_CLK>,
>  				 <&gcc GCC_SDCC2_APPS_CLK>,
> -- 
> 2.38.1