[PATCH 5/6] arm64: dts: qcom: msm8976: Declare and use SDC2 pins

From: Marijn Suijten
Date: Wed Dec 14 2022 - 18:21:55 EST


Add the pinctrl states for SDC2 and use them on sdhc_2 to support SD
Cards on the currently mainlined Sony Loire platform.

Signed-off-by: Marijn Suijten <marijn.suijten@xxxxxxxxxxxxxx>
---
.../qcom/msm8956-sony-xperia-loire-kugo.dts | 6 +++
.../dts/qcom/msm8956-sony-xperia-loire.dtsi | 6 +++
arch/arm64/boot/dts/qcom/msm8976.dtsi | 45 +++++++++++++++++++
3 files changed, 57 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/msm8956-sony-xperia-loire-kugo.dts b/arch/arm64/boot/dts/qcom/msm8956-sony-xperia-loire-kugo.dts
index 3fb8e23e4330..9178943e2ee1 100644
--- a/arch/arm64/boot/dts/qcom/msm8956-sony-xperia-loire-kugo.dts
+++ b/arch/arm64/boot/dts/qcom/msm8956-sony-xperia-loire-kugo.dts
@@ -33,3 +33,9 @@ &pm8950_l1 {
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1300000>;
};
+
+&sdc2_on_state {
+ data-pins {
+ drive-strength = <8>;
+ };
+};
diff --git a/arch/arm64/boot/dts/qcom/msm8956-sony-xperia-loire.dtsi b/arch/arm64/boot/dts/qcom/msm8956-sony-xperia-loire.dtsi
index 700583a56a0e..2253fb05f1c9 100644
--- a/arch/arm64/boot/dts/qcom/msm8956-sony-xperia-loire.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8956-sony-xperia-loire.dtsi
@@ -264,6 +264,12 @@ &sdhc_1 {
status = "okay";
};

+&sdc2_on_state {
+ clk-pins {
+ drive-strength = <10>;
+ };
+};
+
&sdhc_2 {
bus-width = <4>;
cd-gpios = <&tlmm 100 GPIO_ACTIVE_HIGH>;
diff --git a/arch/arm64/boot/dts/qcom/msm8976.dtsi b/arch/arm64/boot/dts/qcom/msm8976.dtsi
index 7d4c7548882c..f3371eaa2940 100644
--- a/arch/arm64/boot/dts/qcom/msm8976.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8976.dtsi
@@ -558,6 +558,46 @@ rclk-pins {
};
};

+ sdc2_off_state: sdc2-off-state {
+ clk-pins {
+ pins = "sdc2_clk";
+ drive-strength = <2>;
+ bias-disable;
+ };
+
+ cmd-pins {
+ pins = "sdc2_cmd";
+ drive-strength = <2>;
+ bias-pull-up;
+ };
+
+ data-pins {
+ pins = "sdc2_data";
+ drive-strength = <2>;
+ bias-pull-up;
+ };
+ };
+
+ sdc2_on_state: sdc2-on-state {
+ clk-pins {
+ pins = "sdc2_clk";
+ drive-strength = <16>;
+ bias-disable;
+ };
+
+ cmd-pins {
+ pins = "sdc2_cmd";
+ drive-strength = <10>;
+ bias-pull-up;
+ };
+
+ data-pins {
+ pins = "sdc2_data";
+ drive-strength = <10>;
+ bias-pull-up;
+ };
+ };
+
spi1_default: spi0-default-state {
spi-pins {
pins = "gpio0", "gpio1", "gpio3";
@@ -751,6 +791,11 @@ sdhc_2: mmc@7864000 {
<&gcc GCC_SDCC2_APPS_CLK>,
<&rpmcc RPM_SMD_XO_CLK_SRC>;
clock-names = "iface", "core", "xo";
+
+ pinctrl-0 = <&sdc2_on_state>;
+ pinctrl-1 = <&sdc2_off_state>;
+ pinctrl-names = "default", "sleep";
+
status = "disabled";
};

--
2.39.0