Re: [PATCH v2 06/15] KVM: vmx/pmu: Emulate MSR_ARCH_LBR_CTL for guest Arch LBR

[Yang, Weijiang]

On 12/22/2022 7:24 PM, Like Xu wrote:
> On 25/11/2022 12:05 pm, Yang Weijiang wrote:
> > diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
> > index cea8c07f5229..1ae2efc29546 100644
> > --- a/arch/x86/kvm/vmx/vmx.c
> > +++ b/arch/x86/kvm/vmx/vmx.c
> > @@ -2120,6 +2120,13 @@ static int vmx_set_msr(struct kvm_vcpu *vcpu, 
> > struct msr_data *msr_info)
> >                           VM_EXIT_SAVE_DEBUG_CONTROLS)
> >               get_vmcs12(vcpu)->guest_ia32_debugctl = data;
> >   +        /*
> > +         * For Arch LBR, IA32_DEBUGCTL[bit 0] has no meaning.
> > +         * It can be written to 0 or 1, but reads will always return 0.
> > +         */
>
> The comment looks good, please verify it with a test.


OK, I'll add the test into pmu_lbr KUT test together with arch-lbr test 
cases.



> > +        if (guest_cpuid_has(vcpu, X86_FEATURE_ARCH_LBR))
> > +            data &= ~DEBUGCTLMSR_LBR;
> > +
> >           vmcs_write64(GUEST_IA32_DEBUGCTL, data);
> >           if (intel_pmu_lbr_is_enabled(vcpu) && 
> > !to_vmx(vcpu)->lbr_desc.event &&
> >               (data & DEBUGCTLMSR_LBR))