Re: [PATCH v2 06/15] KVM: vmx/pmu: Emulate MSR_ARCH_LBR_CTL for guest Arch LBR

[Yang, Weijiang]

On 12/22/2022 7:19 PM, Like Xu wrote:
> On 25/11/2022 12:05 pm, Yang Weijiang wrote:
> > @@ -727,12 +772,16 @@ static void intel_pmu_reset(struct kvm_vcpu *vcpu)
> >    */
> >   static void intel_pmu_legacy_freezing_lbrs_on_pmi(struct kvm_vcpu 
> > *vcpu)
> >   {
> > -    u64 data = vmcs_read64(GUEST_IA32_DEBUGCTL);
> > +    u32 lbr_ctl_field = GUEST_IA32_DEBUGCTL;
> >   -    if (data & DEBUGCTLMSR_FREEZE_LBRS_ON_PMI) {
> > -        data &= ~DEBUGCTLMSR_LBR;
> > -        vmcs_write64(GUEST_IA32_DEBUGCTL, data);
> > -    }
> > +    if (!(vmcs_read64(GUEST_IA32_DEBUGCTL) & 
> > DEBUGCTLMSR_FREEZE_LBRS_ON_PMI))
> > +        return;
> > +
> > +    if (kvm_cpu_cap_has(X86_FEATURE_ARCH_LBR) &&
> > +        guest_cpuid_has(vcpu, X86_FEATURE_ARCH_LBR))
> > +        lbr_ctl_field = GUEST_IA32_LBR_CTL;
> > +
> > +    vmcs_write64(lbr_ctl_field, vmcs_read64(lbr_ctl_field) & ~0x1ULL);
> >   }
> >     static void intel_pmu_deliver_pmi(struct kvm_vcpu *vcpu)
>
> The legacy lbr test case in KUT does not cover this scenario, but
> arch lbr contributor should take the opportunity to fill this gap. 
> Thanks.


OK,  will try to add this missing part check.