Re: [PATCH v3 13/34] m68k: Implement the new page table range API

From: Michael Schmitz
Date: Sun Mar 05 2023 - 15:44:31 EST


Hi Matthew, Geert,

sorry, I missed that one when it got posted ...

On 6/03/23 04:28, Matthew Wilcox wrote:
On Sun, Mar 05, 2023 at 11:16:13AM +0100, Geert Uytterhoeven wrote:
+ while (nr--) {
+ __asm__ __volatile__("nop\n\t"
+ ".chip 68040\n\t"
+ "cpushp %%bc,(%0)\n\t"
+ ".chip 68k"
+ : : "a" (paddr + nr * PAGE_SIZE));
As gcc (9.5.0) keeps on calculating "paddr + nr * PAGE_SIZE"
inside the loop (albeit using a shift instead of a multiplication),
please use "paddr" here, followed by "paddr += PAGE_SIZE;".

Are we certain that contiguous vaddr always maps to contiguous paddr?

If not, I'd suggest we increment vaddr inside the loop, and use __pa() each time:

+++ b/arch/m68k/include/asm/cacheflush_mm.h
@@ -235,13 +235,14 @@ static inline void __flush_pages_to_ram(void *vaddr, unsigned int nr)
} else if (CPU_IS_040_OR_060) {
- while (nr--) {
+ do {
__asm__ __volatile__("nop\n\t"
".chip 68040\n\t"
"cpushp %%bc,(%0)\n\t"
".chip 68k"
- : : "a" (paddr + nr * PAGE_SIZE));
- }
+ : : "a" __pa(vaddr));
+ vaddr += PAGE_SIZE;
+ } while (--nr);
} else {
unsigned long _tmp;
__asm__ __volatile__("movec %%cacr,%0\n\t"

(just edited Matthew's patch in the mail editor, untested, may not apply cleanly ...)

Cheers,

    Michael