On Tue, Mar 07, 2023 at 02:26:08PM +0300, Arınç ÜNAL wrote:
Port 5 as CPU port works fine with this patch. I completely removed from
port 6 phy modes.
With your patch on MT7621 (remember port 5 always worked on MT7623):
- Port 5 at rgmii as the only CPU port works, even though the PLL frequency
won't be set. The download/upload speed is not affected.
That's good. Empirically it seems to prove that ncpo1 only affects p6,
which was my initial assumption.
- port 6 at trgmii mode won't work if the PLL frequency is not set. The
SoC's MAC (gmac0) won't receive anything. It checks out since setting the
PLL frequency is put under the "Setup the MT7530 TRGMII Tx Clock" comment.
So port 6 cannot properly transmit frames to the SoC's MAC.
- Port 6 at rgmii mode works without setting the PLL frequency. Speed is not
affected.
I commented out core_write(priv, CORE_PLL_GROUP5,
RG_LCDDS_PCW_NCPO1(ncpo1)); to stop setting the PLL frequency.
In conclusion, setting the PLL frequency is only needed for the trgmii mode,
so I believe we can get rid of it on other cases.
Got it, sounds expected, then? My patch can be submitted as-is, correct?
One more thing, on MT7621, xtal matches to both HWTRAP_XTAL_40MHZ and
HWTRAP_XTAL_25MHZ so the final value of ncpo1 is 0x0a00. I'm not sure if
xtal matching both of them is the expected behaviour.
diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c
index fbf27d4ab5d9..12cea89ae0ac 100644
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -439,8 +439,12 @@ mt7530_pad_clk_setup(struct dsa_switch *ds, phy_interface_t interface)
/* PLL frequency: 150MHz: 1.2GBit */
if (xtal == HWTRAP_XTAL_40MHZ)
ncpo1 = 0x0780;
+ dev_info(priv->dev, "XTAL is 40MHz, ncpo1 is 0x0780\n");
In the C language, you need to put brackets { } around multi-statement
"if" blocks. Otherwise, despite the indentation, "dev_info" will be
executed unconditionally (unlike in Python for example). There should
also be a warning with newer gcc compilers about the misleading
indentation not leading to the expected code.
Like this:
if (xtal == HWTRAP_XTAL_40MHZ) {
ncpo1 = 0x0780;
dev_info(priv->dev, "XTAL is 40MHz, ncpo1 is 0x0780\n");
}
if (xtal == HWTRAP_XTAL_25MHZ)
ncpo1 = 0x0a00;
+ dev_info(priv->dev, "XTAL is 25MHz, ncpo1 is 0x0a00\n");
+ if (xtal == HWTRAP_XTAL_20MHZ)
+ dev_info(priv->dev, "XTAL is 20MHz too\n");
} else { /* PLL frequency: 250MHz: 2.0Gbit */
if (xtal == HWTRAP_XTAL_40MHZ)
ncpo1 = 0x0c80;
[ 0.710455] mt7530 mdio-bus:1f: MT7530 adapts as multi-chip module
[ 0.734419] mt7530 mdio-bus:1f: configuring for fixed/rgmii link mode
[ 0.741766] mt7530 mdio-bus:1f: Link is Up - 1Gbps/Full - flow control rx/tx
[ 0.743647] mt7530 mdio-bus:1f: configuring for fixed/trgmii link mode
[ 0.755422] mt7530 mdio-bus:1f: XTAL is 40MHz, ncpo1 is 0x0780
[ 0.761250] mt7530 mdio-bus:1f: XTAL is 25MHz, ncpo1 is 0x0a00
[ 0.769414] mt7530 mdio-bus:1f: Link is Up - 1Gbps/Full - flow control rx/tx
[ 0.772067] mt7530 mdio-bus:1f lan1 (uninitialized): PHY [mt7530-0:00] driver [MediaTek MT7530 PHY] (irq=17)
[ 0.788647] mt7530 mdio-bus:1f lan2 (uninitialized): PHY [mt7530-0:01] driver [MediaTek MT7530 PHY] (irq=18)
[ 0.800354] mt7530 mdio-bus:1f lan3 (uninitialized): PHY [mt7530-0:02] driver [MediaTek MT7530 PHY] (irq=19)
[ 0.812031] mt7530 mdio-bus:1f lan4 (uninitialized): PHY [mt7530-0:03] driver [MediaTek MT7530 PHY] (irq=20)
[ 0.823418] mtk_soc_eth 1e100000.ethernet eth1: entered promiscuous mode
[ 0.830250] mtk_soc_eth 1e100000.ethernet eth0: entered promiscuous mode
[ 0.837007] DSA: tree 0 setup
Thunderbird limits lines to about 72 columns, so I'm pasting as quotation
which seems to bypass that.
That seems to have worked, but shouldn't have been needed. I've uninstalled
Thunderbird in favor of mutt + vim for email editing.. although, isn't
there a Word Wrap option which you can just turn off?