Hi, Ruoyao,
On Tue, Mar 14, 2023 at 5:41 PM Xi Ruoyao <xry111@xxxxxxxxxxx> wrote:
Yes, very unfortunately, but this issue is only observed in the amdgpu
On Tue, 2023-03-14 at 16:54 +0800, Huacai Chen wrote:
LoongArch maintains cache coherency in hardware, but when works with
LS7A chipsets the WUC attribute (Weak-ordered UnCached, which is similar
to WriteCombine) is out of the scope of cache coherency machanism for
PCIe devices (this is a PCIe protocol violation, may be fixed in newer
chipsets).
IIUC all launched LS7A models (7A1000 and 7A2000) suffers this issue?
driver now.
Not a good idea, pci quirks need too long a time to review, and we
This means WUC can only used for write-only memory regions now, so this
option is disabled by default (means WUC falls back to SUC for ioremap).
You can enable this option if the kernel is ensured to run on bug-free
hardwares.
Hmm, is it possible to make a PCI quirk so SUC/WUC will be decided
automatically from the vendor:device ID of the PCI root controller?
Then we don't need to rely on the user or distro maintainer to select an
option. I see there is already many architecture-dependant #if
directives in drivers/pci/quirks.c so I guess such a quirk is acceptable
in PCI tree...
don't know when this issue can be fixed in hardware.
If we use command line parameter, we can remove this Kconfig option.
If a PCI quirk is not possible, then is it possible to make a kernel
command line option, leaving this CONFIG as the default value of the
option? I guess in the future many LoongArch users will just install a
binary distro, then it would be much easier to edit grub.cfg than
rebuilding the kernel when they finally buy a compliant PCIe controller.