Re: [PATCH v1 2/2] doc: dt: bindings: usb: realtek,dwc3: Add Realtek DHC RTD SoC DWC3 USB

From: Rob Herring
Date: Wed Aug 02 2023 - 21:18:48 EST


On Fri, Jul 28, 2023 at 11:53:13AM +0800, Stanley Chang wrote:
> Document the DWC3 USB bindings for Realtek SoCs.
>
> Signed-off-by: Stanley Chang <stanley_chang@xxxxxxxxxxx>
> ---
> .../devicetree/bindings/usb/realtek,dwc3.yaml | 107 ++++++++++++++++++
> 1 file changed, 107 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/usb/realtek,dwc3.yaml
>
> diff --git a/Documentation/devicetree/bindings/usb/realtek,dwc3.yaml b/Documentation/devicetree/bindings/usb/realtek,dwc3.yaml
> new file mode 100644
> index 000000000000..74d388809924
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/usb/realtek,dwc3.yaml
> @@ -0,0 +1,107 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +# Copyright 2023 Realtek Semiconductor Corporation
> +%YAML 1.2
> +---
> +$id: "http://devicetree.org/schemas/usb/realtek,dwc3.yaml#";
> +$schema: "http://devicetree.org/meta-schemas/core.yaml#";
> +
> +title: Realtek DWC3 USB SoC Controller Glue
> +
> +maintainers:
> + - Stanley Chang <stanley_chang@xxxxxxxxxxx>
> +
> +description:
> + The Realtek DHC SoC embeds a DWC3 USB IP Core configured for USB 2.0
> + and USB 3.0 in host or dual-role mode.
> +
> +properties:
> + compatible:
> + items:
> + - enum:
> + - realtek,rtd1295-dwc3
> + - realtek,rtd1315e-dwc3
> + - realtek,rtd1319-dwc3
> + - realtek,rtd1319d-dwc3
> + - realtek,rtd1395-dwc3
> + - realtek,rtd1619-dwc3
> + - realtek,rtd1619b-dwc3
> + - const: realtek,rtd-dwc3
> +
> + reg:
> + maxItems: 1

Some details on what these registers are would be useful. Or describing
what's in the 'glue' device?

> +
> + '#address-cells':
> + const: 1
> +
> + '#size-cells':
> + const: 1
> +
> + ranges: true
> +
> + realtek,unlink-usb3-port:
> + description: Disable link between USB 3.0 PHY and USB mac.
> + Only for RTD1619 SoC, if the board design support maximum 2.0 speed.
> + type: boolean

We have a property for this: maximum-speed

That belongs in the USB controller node though.

> +
> + realtek,disable-usb3-phy:
> + description: Close USB 3.0 PHY if the board design not support USB 3.0.
> + type: boolean

Can't this be determined by not having a USB3 phy listed?

> +
> + realtek,enable-l4icg:
> + description: Enable the power saving feature l4icg by hardware clock.
> + gating.
> + type: boolean
> +
> +patternProperties:
> + "^usb@[0-9a-f]+$":
> + $ref: snps,dwc3.yaml#
> + description: Required child node
> +
> +required:
> + - compatible
> + - reg
> + - "#address-cells"
> + - "#size-cells"
> + - ranges
> +
> +allOf:
> + - if:
> + not:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - realtek,rtd1619-dwc3
> + then:
> + properties:
> + realtek,unlink-usb3-port: false
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + usb@98013e00 {
> + compatible = "realtek,rtd1319d-dwc3", "realtek,rtd-dwc3";
> + reg = <0x98013e00 0x200>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
> + status = "okay";

Drop status from examples.

> + realtek,disable-usb3-phy;
> + realtek,enable-l4icg;
> +
> + usb@98050000 {
> + compatible = "snps,dwc3";
> + reg = <0x98050000 0x9000>;
> + interrupts = <0 94 4>;
> + phys = <&usb2phy &usb3phy>;
> + phy-names = "usb2-phy", "usb3-phy";
> + dr_mode = "otg";
> + usb-role-switch;
> + role-switch-default-mode = "host";
> + snps,dis_u2_susphy_quirk;
> + snps,parkmode-disable-ss-quirk;
> + snps,parkmode-disable-hs-quirk;
> + maximum-speed = "high-speed";
> + };
> + };
> --
> 2.34.1
>