RE: [PATCH v2 3/5] dt-bindings: clock: add Intel Agilex5 clock manager

[Rabara, Niravkumar L]

> -----Original Message-----
> From: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx>
> Sent: Monday, 7 August, 2023 3:35 AM
> To: Rabara, Niravkumar L <niravkumar.l.rabara@xxxxxxxxx>
> Cc: Ng, Adrian Ho Yin <adrian.ho.yin.ng@xxxxxxxxx>; andrew@xxxxxxx;
> conor+dt@xxxxxxxxxx; devicetree@xxxxxxxxxxxxxxx; dinguyen@xxxxxxxxxx;
> krzysztof.kozlowski+dt@xxxxxxxxxx; linux-clk@xxxxxxxxxxxxxxx; linux-
> kernel@xxxxxxxxxxxxxxx; Turquette, Mike <mturquette@xxxxxxxxxxxx>;
> netdev@xxxxxxxxxxxxxxx; p.zabel@xxxxxxxxxxxxxx;
> richardcochran@xxxxxxxxx; robh+dt@xxxxxxxxxx; sboyd@xxxxxxxxxx;
> wen.ping.teh@xxxxxxxxx
> Subject: Re: [PATCH v2 3/5] dt-bindings: clock: add Intel Agilex5 clock
> manager
> 
> On 01/08/2023 03:02, niravkumar.l.rabara@xxxxxxxxx wrote:
> > From: Niravkumar L Rabara <niravkumar.l.rabara@xxxxxxxxx>
> >
> > Add clock ID definitions for Intel Agilex5 SoCFPGA.
> > The registers in Agilex5 handling the clock is named as clock manager.
> >
> > Signed-off-by: Teh Wen Ping <wen.ping.teh@xxxxxxxxx>
> > Reviewed-by: Dinh Nguyen <dinguyen@xxxxxxxxxx>
> > Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@xxxxxxxxx>
> > ---
> 
> Do not attach (thread) your patchsets to some other threads (unrelated or
> older versions). This buries them deep in the mailbox and might interfere
> with applying entire sets.
> 
> Best regards,
> Krzysztof

Sorry it was a mistake.
Will be careful now onwards.

Thanks,
Nirav