Re: [PATCH 2/3] dt-bindings: clock: add qca8386/qca8084 clock and reset definitions

[Jie Luo]

On 8/8/2023 1:57 PM, Krzysztof Kozlowski wrote:
> On 08/08/2023 07:19, Jie Luo wrote:
> > > > +properties:
> > > > +  compatible:
> > > > +    const: qcom,nsscc-qca8k
> > >
> > > SoC name is before IP block names. See:
> > > Documentation/devicetree/bindings/arm/qcom-soc.yaml
> > >
> > > qca8k is not SoC specific. I don't know what you are documenting here,
> > > but if this is a SoC, then follow SoC rules.
> > >
> > > If this is not SoC, it confuses me a bit to use GCC binding.
> > >
> > > Anyway, this was not tested, as pointed out by bot... Please test the
> > > code before sending.
> > >
> > > Best regards,
> > > Krzysztof
> >
> > Hi Krzysztof,
> >
> > Thanks for the review comments.
> > qca8383/qca8084 is a network chip that support switch mode and PHY mode,
> > the hardware register is accessed by MDIO bus, which is not a SOC.
> >
> > But it has the self-contained clock controller system, the clock
> > framework of qca8386/qca8084 is same as the GCC of ipq platform such as
> > ipq9574.
>
> OK
>
> > would you help advise whether we can document it with the compatible
> > "qcom,qca8k-nsscc"?
>
> For example:
> qcom,qca8084-nsscc
>
> Best regards,
> Krzysztof
Thanks Krzysztof for the suggestion.

i will document the compatible below.
"qcom,qca8084-nsscc" for the PHY mode of device.
"qcom,qca8386-nsscc" for the switch mode of device.

Jie.