Re: [PATCH v2] cxl/pci: Fix disabling memory if DVSEC CXL Range does not match a CFMWS window

[Robert Richter]

On 16.02.24 19:09:30, Robert Richter wrote:
> On 16.02.24 10:02:51, Dan Williams wrote:
> > Robert Richter wrote:
> > > The Linux CXL subsystem is built on the assumption that HPA == SPA.
> > > That is, the host physical address (HPA) the HDM decoder registers are
> > > programmed with are system physical addresses (SPA).
> > > 
> > > During HDM decoder setup, the DVSEC CXL range registers (cxl-3.1,
> > > 8.1.3.8) are checked if the memory is enabled and the CXL range is in
> > > a HPA window that is described in a CFMWS structure of the CXL host
> > > bridge (cxl-3.1, 9.18.1.3).
> > > 
> > > Now, if the HPA is not an SPA, the CXL range does not match a CFMWS
> > > window and the CXL memory range will be disabled then. The HDM decoder
> > > stops working which causes system memory being disabled and further a
> > > system hang during HDM decoder initialization, typically when a CXL
> > > enabled kernel boots.
> > > 
> > > Prevent a system hang and do not disable the HDM decoder if the
> > > decoder's CXL range is not found in a CFMWS window.
> > > 
> > > Note the change only fixes a hardware hang, but does not implement
> > > HPA/SPA translation. Support for this can be added in a follow on
> > > patch series.
> > > 

Fixes: 9de321e93c3b ("cxl/pci: Refactor cxl_hdm_decode_init()")
Fixes: 34e37b4c432c ("cxl/port: Enable HDM Capability after validating DVSEC Ranges")
Cc: stable@xxxxxxxxxxxxxxx

Sorry, I forgot those tags, please add.

Thanks,

-Robert

> > > Signed-off-by: Robert Richter <rrichter@xxxxxxx>
> > > ---
> > >  drivers/cxl/core/pci.c | 4 ++--
> > >  1 file changed, 2 insertions(+), 2 deletions(-)