Re: [PATCH v2 2/2] arm64: dts: qcom: sc8280xp: Describe the PCIe SMMUv3

[Konrad Dybcio]

On 18.03.2024 02:31, Bjorn Andersson wrote:
> On Sat, Mar 09, 2024 at 02:31:10PM +0100, Konrad Dybcio wrote:
>> SC8280XP actually has a third SMMU, which can be seen in e.g. the IORT
>> ACPI table and is used for the PCIe hosts.
>>
>> Unfortunately though, the secure firmware seems to be configured in a
>> way such that Linux can't touch it, not even read back the ID registers.
>> It also seems like the SMMU is configured to run in some sort of bypass
>> mode, completely opaque to the OS.
>>
>> Describe it so that one can configure it when running Linux as a
>> hypervisor (e.g with [1]) and for hardware description completeness.
>>
>> [1] https://github.com/TravMurav/slbounce
>> Signed-off-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxx>
> 
> Have this information been validated? Or are you suggesting we add it
> for documentation purposes?

I confirmed the platforms boots up with this if the hypervisor is gone.

Konrad