Re: [RISC-V] [tech-j-ext] [RFC PATCH 5/9] riscv: Split per-CPU and per-thread envcfg bits

[Deepak Gupta]

On Wed, Mar 27, 2024 at 06:58:45PM -0700, Deepak Gupta via lists.riscv.org wrote:
> On Tue, Mar 19, 2024 at 7:21 PM Samuel Holland
> <samuel.holland@xxxxxxxxxx> wrote:
> > >         else
> > >                 regs->status |= SR_UXL_64;
> > >  #endif
> > > +       current->thread_info.envcfg = ENVCFG_BASE;
> > >  }
> > >
> > > And instead of context switching in `_switch_to`,
> > > In `entry.S` pick up `envcfg` from `thread_info` and write it into CSR.
> >
> > The immediate reason is that writing envcfg in ret_from_exception() adds cycles
> > to every IRQ and system call exit, even though most of them will not change the
> > envcfg value. This is especially the case when returning from an IRQ/exception
> > back to S-mode, since envcfg has zero effect there.
>
> A quick observation:
> So I tried this on my setup. When I put `senvcfg` writes in
> `__switch_to ` path, qemu suddenly
> just tanks and takes a lot of time to boot up as opposed to when
> `senvcfg` was in trap return path.
> In my case entire userspace (all processes) have cfi enabled for them
> via `senvcfg` and it gets
> context switched. Not sure it's specific to my setup. I don't think it
> should be an issue on actual
> hardware.
>
> Still debugging why it slows down my qemu drastically when same writes
> to same CSR
> are moved from `ret_from_exception` to `switch_to`

Nevermind and sorry for the bother. An issue on my setup.

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