main_uart5 node defined in the SoC dtsi file is incompleteTest Logs: https://gist.github.com/a0498981/dc8b0cb670a5726eeb6c10f6de1f468e
and will not be functional unless it is extended with pinmux
information at board integration level.
Thus, add pinmux for main_uart5 in the board dts file and
enable it to make it functional.
Signed-off-by: Bhavya Kapoor <b-kapoor@xxxxxx>
---
arch/arm64/boot/dts/ti/k3-j722s-evm.dts | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts
index bf3c246d13d1..e3892a6f2fab 100644
--- a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts
+++ b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts
@@ -18,6 +18,7 @@ / {
aliases {
serial0 = &wkup_uart0;
serial2 = &main_uart0;
+ serial3 = &main_uart5;
mmc0 = &sdhci0;
mmc1 = &sdhci1;
};
@@ -142,6 +143,14 @@ J722S_IOPAD(0x01cc, PIN_OUTPUT, 0) /* (B22) UART0_TXD */
bootph-all;
};
+ main_uart5_pins_default: main-uart5-default-pins {
+ pinctrl-single,pins = <
+ J722S_IOPAD(0x0108, PIN_INPUT, 3) /* (J27) UART5_RXD */
+ J722S_IOPAD(0x010c, PIN_OUTPUT, 3) /* (H27) UART5_TXD */
+ >;
+ bootph-all;
+ };
+
vdd_sd_dv_pins_default: vdd-sd-dv-default-pins {
pinctrl-single,pins = <
J722S_IOPAD(0x0120, PIN_INPUT, 7) /* (F27) MMC2_CMD.GPIO0_70 */
@@ -240,6 +249,13 @@ &main_uart0 {
bootph-all;
};
+&main_uart5 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_uart5_pins_default>;
+ status = "okay";
+ bootph-all;
+};
+
&mcu_pmx0 {
wkup_uart0_pins_default: wkup-uart0-default-pins {