Re: [PATCH] perf/x86/intel/pt: Update topa_entry base len to support 52-bit physical addresses
From: Adrian Hunter
Date: Tue Jun 18 2024 - 13:37:24 EST
On 18/06/24 14:06, Marco Cavenati wrote:
> Increase topa_entry base to 40 bits to accommodate page addresses in
> systems with 52-bit physical addresses.
> The Base Physical Address field (base) has a length of MAXPHYADDR - 12 as
> stated in Intel's SDM chapter 33.2.7.2.
> The maximum MAXPHYADDR is 52 as stated in SDM 4.1.4.
> Therefore, the maximum base bit length is 40.
>
> Signed-off-by: Marco Cavenati <cavenati.marco@xxxxxxxxx>
Reviewed-by: Adrian Hunter <adrian.hunter@xxxxxxxxx>
Getting 'base' physical address wrong would presumably
be bad, so:
Fixes: 52ca9ced3f70 ("perf/x86/intel/pt: Add Intel PT PMU driver")
Cc: stable@xxxxxxxxxxxxxxx
> ---
> arch/x86/events/intel/pt.h | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/x86/events/intel/pt.h b/arch/x86/events/intel/pt.h
> index 96906a62aacd..f5e46c04c145 100644
> --- a/arch/x86/events/intel/pt.h
> +++ b/arch/x86/events/intel/pt.h
> @@ -33,8 +33,8 @@ struct topa_entry {
> u64 rsvd2 : 1;
> u64 size : 4;
> u64 rsvd3 : 2;
> - u64 base : 36;
> - u64 rsvd4 : 16;
> + u64 base : 40;
> + u64 rsvd4 : 12;
> };
>
> /* TSC to Core Crystal Clock Ratio */